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https://github.com/TomHarte/CLK.git
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Double nominal clock, to hit normative values.
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@ -113,11 +113,11 @@ public:
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timers_(interrupts_),
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video_(map_, interrupts_)
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{
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// PAL: 8867240 divided by 5 or 4?
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// NTSC: 7159090?
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// PAL: 17,734,480 Mhz divided by 5 or 4?
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// NTSC: 14,318,180 Mhz
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// i.e. colour subcarriers multiplied by two?
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set_clock_rate(8867240); // TODO.
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set_clock_rate(17'734'480);
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const auto kernel = ROM::Name::Plus4KernelPALv5;
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const auto basic = ROM::Name::Plus4BASIC;
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@ -121,9 +121,9 @@ public:
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const bool is_long_cycle = single_clock_ || refresh_;
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if(is_ntsc_) {
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return is_long_cycle ? Cycles(8) : Cycles(4);
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return is_long_cycle ? Cycles(16) : Cycles(8);
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} else {
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return is_long_cycle ? Cycles(10) : Cycles(5);
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return is_long_cycle ? Cycles(20) : Cycles(10);
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}
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}
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@ -141,11 +141,18 @@ public:
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void run_for(Cycles cycles) {
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// Timing:
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//
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// 456 cycles/line;
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// if in PAL mode, divide input clock by 1.25 (?);
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// see page 34 of plus4_tech.pdf for event times.
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// Input clock is at 17.7Mhz PAL or 14.38Mhz NTSC. i.e. each is four times the colour subcarrier.
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//
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// In PAL mode, divide by 5 and multiply by 2 to get the internal pixel clock.
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//
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// In NTSC mode just dividing by 2 would do to get the pixel clock but in practice that's implemented as
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// a divide by 4 and a multiply by 2 to keep it similar to the PAL code.
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//
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// That gives close enough to 456 pixel clocks per line in both systems so the TED just rolls with that.
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subcycles_ += cycles * 4;
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// See page 34 of plus4_tech.pdf for event times.
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subcycles_ += cycles * 2;
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auto ticks_remaining = subcycles_.divide(is_ntsc_ ? Cycles(4) : Cycles(5)).as<int>();
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while(ticks_remaining) {
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//
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