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https://github.com/TomHarte/CLK.git
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Implemented RLD and RRD. 34 failures remaining.
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@ -167,7 +167,7 @@ class FUSETests: XCTestCase {
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let name = itemDictionary["name"] as! String
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// if name != "a0" {
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// if name != "ed62" {
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// continue;
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// }
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@ -122,6 +122,7 @@ struct MicroOp {
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RLA, RLCA, RRA, RRCA,
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RLC, RRC, RL, RR,
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SLA, SRA, SLL, SRL,
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RLD, RRD,
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SetInstructionPage,
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CalculateIndexAddress,
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@ -367,11 +368,11 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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/* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(hl_.bytes.high),
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/* 0x62 SBC HL, HL */ SBC16(hl_, hl_), /* 0x63 LD (nn), HL */ Program(FETCH16(temp16_, pc_), STORE16L(hl_, temp16_)),
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/* 0x64 NEG */ Program({MicroOp::NEG}), /* 0x65 RETN */ Program(POP(pc_), {MicroOp::RETN}),
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/* 0x66 IM 0 */ Program({MicroOp::IM}), /* 0x67 RRD */ XX,
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/* 0x66 IM 0 */ Program({MicroOp::IM}), /* 0x67 RRD */ Program(FETCHL(temp8_, hl_), WAIT(4), {MicroOp::RRD}, STOREL(temp8_, hl_)),
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/* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(hl_.bytes.low),
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/* 0x6a ADC HL, HL */ ADC16(hl_, hl_), /* 0x6b LD HL, (nn) */ Program(FETCH16(temp16_, pc_), FETCH16L(hl_, temp16_)),
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/* 0x6c NEG */ Program({MicroOp::NEG}), /* 0x6d RETN */ Program(POP(pc_), {MicroOp::RETN}),
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/* 0x6e IM 0/1 */ Program({MicroOp::IM}), /* 0x6f RLD */ XX,
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/* 0x6e IM 0/1 */ Program({MicroOp::IM}), /* 0x6f RLD */ Program(FETCHL(temp8_, hl_), WAIT(4), {MicroOp::RLD}, STOREL(temp8_, hl_)),
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/* 0x70 IN (C) */ IN_C(temp8_),
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/* 0x71 OUT (C), 0 */ Program({MicroOp::SetZero}, OUT(bc_, temp8_)),
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/* 0x72 SBC HL, SP */ SBC16(hl_, sp_), /* 0x73 LD (nn), SP */ Program(FETCH16(temp16_, pc_), STORE16L(sp_, temp16_)),
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@ -1019,7 +1020,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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sign_result_ = (uint8_t)(result >> 8);
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zero_result_ = (uint8_t)(result | sign_result_);
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subtract_flag_ = Flag::Subtract;
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carry_flag_ = result >> 16;
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carry_flag_ = (result >> 16) & Flag::Carry;
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half_carry_flag_ = (halfResult >> 8) & Flag::HalfCarry;
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parity_overflow_flag_ = (overflow & 0x8000) >> 13;
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@ -1196,6 +1197,29 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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#undef set_shift_flags
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#define set_decimal_rotate_flags() \
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subtract_flag_ = 0; \
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half_carry_flag_ = 0; \
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set_parity(a_); \
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bit3_result_ = bit5_result_ = zero_result_ = sign_result_ = a_;
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case MicroOp::RRD: {
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uint8_t low_nibble = a_ & 0xf;
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a_ = (a_ & 0xf0) | (temp8_ & 0xf);
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temp8_ = (temp8_ >> 4) | (low_nibble << 4);
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set_decimal_rotate_flags();
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} break;
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case MicroOp::RLD: {
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uint8_t low_nibble = a_ & 0xf;
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a_ = (a_ & 0xf0) | (temp8_ >> 4);
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temp8_ = (temp8_ << 4) | low_nibble;
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set_decimal_rotate_flags();
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} break;
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#undef set_decimal_rotate_flags
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#pragma mark - Interrupt state
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case MicroOp::EI:
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