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Merge pull request #715 from TomHarte/TestsRedux

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After rerunning all tests, adds some notes on questionable results.
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Thomas Harte 2020-01-04 16:41:01 -05:00 committed by GitHub
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OSBindings/Mac/Clock SignalTests/68000 Comparative Tests/eor_andi_ori.json → OSBindings/Mac/Clock SignalTests/68000 Comparative Tests/eor_and_or.json
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OSBindings/Mac/Clock SignalTests/68000 Comparative Tests/readme.md
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@ -29,3 +29,12 @@ I follow every generated opcode with three words of mostly-random data; this dat
Similarly, all initial register contents are random except that the lowest bit is never set, just in case any of them is used to calculate an address for a word or longword.
So the output is very scattergun approach, with a lot of redundancy.
## Questionable Results
I am presently unconvinced by the results for:
* the N flag on many of the [A/S/N]BCD results, as these often seem to conflict with Bart Trzynadlowski's 68knotes.txt; and
* the alleged results of A7-relative JSR, for which the emulator I was testing against appears to have computed a target address for the value of A7 after pushing the existing PC to the stack, which is unlikely because the first of that instruction's program fetches occurs before any stack activity.
This emulator seems not yet to generate values for the undocumented flags of DIVU and DIVS that match those listed here, but that's through lack of documentation. The objective here is to test my implementation of behaviour I am able to find descriptions of against other people's implementations of that same behaviour, to flush out errors in my comprehension and implementation.