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Shunted method bodies inline, given that there's no need for a declaration/definition distinction.

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This commit is contained in:
Thomas Harte 2017-07-31 22:39:25 -04:00
parent 2b168f7383
commit 42dd27c9b1
1 changed files with 155 additions and 161 deletions
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134
Machines/AmstradCPC/AmstradCPC.cpp
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@ -36,60 +36,41 @@ struct CRTCBusHandler {
}
}
std::shared_ptr<Outputs::CRT::CRT> crt_;
void setup_output(float aspect_ratio) {
crt_.reset(new Outputs::CRT::CRT(1024, 8, Outputs::CRT::DisplayType::PAL50, 1));
crt_->set_rgb_sampling_function(
"vec3 rgb_sample(usampler2D sampler, vec2 coordinate, vec2 icoordinate)"
"{"
"return vec3(float(texture(texID, coordinate).r) / 255.0);"
"}");
}
void close_output() {
crt_.reset();
}
std::shared_ptr<Outputs::CRT::CRT> get_crt() {
return crt_;
}
private:
int cycles_;
bool was_enabled_, was_sync_;
std::shared_ptr<Outputs::CRT::CRT> crt_;
};
class ConcreteMachine:
public CPU::Z80::Processor<ConcreteMachine>,
public Machine {
public:
ConcreteMachine();
HalfCycles perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle);
void flush();
void setup_output(float aspect_ratio);
void close_output();
std::shared_ptr<Outputs::CRT::CRT> get_crt();
std::shared_ptr<Outputs::Speaker> get_speaker();
void run_for(const Cycles cycles);
void configure_as_target(const StaticAnalyser::Target &target);
void set_rom(ROMType type, std::vector<uint8_t> data);
private:
CRTCBusHandler crtc_bus_handler_;
Motorola::CRTC::CRTC6845<CRTCBusHandler> crtc_;
HalfCycles clock_offset_;
HalfCycles crtc_counter_;
uint8_t ram_[65536];
std::vector<uint8_t> os_, basic_;
uint8_t *read_pointers_[4];
uint8_t *write_pointers_[4];
};
Machine *Machine::AmstradCPC() {
return new ConcreteMachine;
}
ConcreteMachine::ConcreteMachine() :
ConcreteMachine() :
crtc_counter_(HalfCycles(4)), // This starts the CRTC exactly out of phase with the memory accesses
crtc_(crtc_bus_handler_) {
// primary clock is 4Mhz
set_clock_rate(4000000);
}
}
HalfCycles ConcreteMachine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
inline HalfCycles perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
// Amstrad CPC timing scheme: assert WAIT for three out of four cycles
clock_offset_ = (clock_offset_ + cycle.length) & HalfCycles(7);
set_wait_line(clock_offset_ >= HalfCycles(2));
@ -181,46 +162,32 @@ HalfCycles ConcreteMachine::perform_machine_cycle(const CPU::Z80::PartialMachine
}
return HalfCycles(0);
}
void ConcreteMachine::flush() {
}
void ConcreteMachine::set_rom(ROMType type, std::vector<uint8_t> data) {
// Keep only the two ROMs that are currently of interest.
switch(type) {
case ROMType::OS464: os_ = data; break;
case ROMType::BASIC464: basic_ = data; break;
default: break;
}
}
void ConcreteMachine::setup_output(float aspect_ratio) {
crtc_bus_handler_.crt_.reset(new Outputs::CRT::CRT(1024, 8, Outputs::CRT::DisplayType::PAL50, 1));
crtc_bus_handler_.crt_->set_rgb_sampling_function(
"vec3 rgb_sample(usampler2D sampler, vec2 coordinate, vec2 icoordinate)"
"{"
"return vec3(float(texture(texID, coordinate).r) / 255.0);"
"}");
}
void flush() {}
void ConcreteMachine::close_output() {
crtc_bus_handler_.crt_.reset();
}
void setup_output(float aspect_ratio) {
crtc_bus_handler_.setup_output(aspect_ratio);
}
std::shared_ptr<Outputs::CRT::CRT> ConcreteMachine::get_crt() {
return crtc_bus_handler_.crt_;
}
void close_output() {
crtc_bus_handler_.close_output();
}
std::shared_ptr<Outputs::Speaker> ConcreteMachine::get_speaker() {
std::shared_ptr<Outputs::CRT::CRT> get_crt() {
return crtc_bus_handler_.get_crt();
}
std::shared_ptr<Outputs::Speaker> get_speaker() {
return nullptr;
}
}
void ConcreteMachine::run_for(const Cycles cycles) {
void run_for(const Cycles cycles) {
CPU::Z80::Processor<ConcreteMachine>::run_for(cycles);
}
}
void ConcreteMachine::configure_as_target(const StaticAnalyser::Target &target) {
void configure_as_target(const StaticAnalyser::Target &target) {
// Establish reset memory map as per machine model (or, for now, as a hard-wired 464)
read_pointers_[0] = os_.data();
read_pointers_[1] = &ram_[16384];
read_pointers_[2] = &ram_[32768];
@ -230,4 +197,31 @@ void ConcreteMachine::configure_as_target(const StaticAnalyser::Target &target)
write_pointers_[1] = &ram_[16384];
write_pointers_[2] = &ram_[32768];
write_pointers_[3] = &ram_[49152];
}
void set_rom(ROMType type, std::vector<uint8_t> data) {
// Keep only the two ROMs that are currently of interest.
switch(type) {
case ROMType::OS464: os_ = data; break;
case ROMType::BASIC464: basic_ = data; break;
default: break;
}
}
private:
CRTCBusHandler crtc_bus_handler_;
Motorola::CRTC::CRTC6845<CRTCBusHandler> crtc_;
HalfCycles clock_offset_;
HalfCycles crtc_counter_;
uint8_t ram_[65536];
std::vector<uint8_t> os_, basic_;
uint8_t *read_pointers_[4];
uint8_t *write_pointers_[4];
};
Machine *Machine::AmstradCPC() {
return new ConcreteMachine;
}