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Ensure relevant throwaway stack reads use the previous stack address.
TODO: can CycleFetchPreviousThrowaway be used more widely?
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@ -103,6 +103,10 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
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perform_bus(((registers_.pc - 1) & 0xffff) | registers_.program_bank, &bus_throwaway_, MOS6502Esque::InternalOperationRead);
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break;
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case CycleFetchPreviousThrowaway:
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perform_bus(bus_address_, &bus_throwaway_, MOS6502Esque::InternalOperationRead);
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break;
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//
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// Data fetches and stores.
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//
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@ -320,7 +320,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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target(OperationCopyPBRToData); // Copy PBR to the data register.
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target(CyclePush); // PBR.
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target(CycleAccessStack); // IO.
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target(CycleFetchPreviousThrowaway); // IO.
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target(CycleFetchPC); // New PBR.
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@ -728,14 +728,14 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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// 22h. Stack; s, RTS.
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static void stack_rts(AccessType, bool, const std::function<void(MicroOp)> &target) {
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target(CycleFetchPCThrowaway); // IO.
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target(CycleFetchPCThrowaway); // IO.
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target(CycleFetchPCThrowaway); // IO.
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target(CycleFetchPCThrowaway); // IO.
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target(CyclePull); // PCL.
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target(CyclePull); // PCH.
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target(CycleAccessStack); // IO.
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target(CyclePull); // PCL.
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target(CyclePull); // PCH.
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target(CycleFetchPreviousThrowaway); // IO.
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target(OperationPerform); // [RTS]
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target(OperationPerform); // [RTS]
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}
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// 22i. Stack; s, RTL.
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@ -15,6 +15,8 @@ enum MicroOp: uint8_t {
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CycleFetchPCThrowaway,
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/// Fetches a byte from (PC - 1), and throws it away; useful for IO cycles that immediately follow incremented PCs.
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CycleFetchPreviousPCThrowaway,
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/// Fetches from whichever address was used in the last bus cycle, and throws away the result.
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CycleFetchPreviousThrowaway,
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/// The same as CycleFetchIncrementPC but indicates valid program address rather than valid data address.
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CycleFetchOpcode,
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@ -274,7 +276,7 @@ struct ProcessorStorage {
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// Registers.
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RegisterPair16 a;
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RegisterPair16 x, y;
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RegisterPair16 s;
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RegisterPair16 s;
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uint16_t pc;
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// Flags aplenty.
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