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Add a performer call-out for Scc; use it to implement proper timing in the mk2 68000.
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@ -294,9 +294,11 @@ template <
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int16_t(dest.w));
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} break;
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case Operation::Scc:
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src.b = status.evaluate_condition(instruction.condition()) ? 0xff : 0x00;
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break;
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case Operation::Scc: {
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const bool condition = status.evaluate_condition(instruction.condition());
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src.b = condition ? 0xff : 0x00;
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flow_controller.did_scc(condition);
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} break;
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/*
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CLRs: store 0 to the destination, set the zero flag, and clear
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@ -46,6 +46,10 @@ struct NullFlowController {
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/// Indicates that a bit-manipulation operation (i.e. BTST, BCHG or BSET) was performed, affecting the bit at posiition @c bit_position.
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void did_bit_op([[maybe_unused]] int bit_position) {}
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/// Indicates that an @c Scc was performed; if @c did_set_ff is true then the condition was true and FF
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/// written to the operand; otherwise 00 was written.
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void did_scc([[maybe_unused]] bool did_set_ff) {}
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/// Provides a notification that the upper byte of the status register has been affected by the current instruction;
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/// this gives an opportunity to track the supervisor flag.
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void did_update_status() {}
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@ -156,7 +156,7 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
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// To limit tests run to a subset of files and/or of tests, uncomment and fill in below.
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_fileSet = [NSSet setWithArray:@[
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// @"addq_subq.json",
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@"addq_subq.json",
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// Below this line are passing tests.
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@"abcd_sbcd.json",
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@ -82,6 +82,10 @@ enum ExecutionState: int {
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CHK_no_trap,
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CHK_was_over,
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CHK_was_under,
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Scc_Dn,
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Scc_Dn_did_not_set,
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Scc_Dn_did_set,
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};
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// MARK: - The state machine.
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@ -504,6 +508,14 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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}
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})
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StdCASE(Scc, {
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if(instruction_.mode(0) == Mode::DataRegisterDirect) {
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perform_state_ = Scc_Dn;
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} else {
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perform_state_ = Perform_np;
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}
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});
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default:
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assert(false);
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}
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@ -1024,6 +1036,10 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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Access(operand_[1].high); // nW
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MoveToState(Decode);
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//
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// CHK
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//
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BeginState(CHK):
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Prefetch(); // np
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InstructionSet::M68k::perform<
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@ -1053,7 +1069,32 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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exception_vector_ = InstructionSet::M68k::Exception::CHK;
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MoveToState(StandardException);
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//
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// Scc
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//
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BeginState(Scc_Dn):
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Prefetch(); // np
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InstructionSet::M68k::perform<
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InstructionSet::M68k::Model::M68000,
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ProcessorBase,
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InstructionSet::M68k::Operation::Scc
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>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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// Next state will be set by did_scc.
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break;
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BeginState(Scc_Dn_did_set):
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IdleBus(1); // n
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[[fallthrough]];
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BeginState(Scc_Dn_did_not_set):
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next_operand_ = 0;
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MoveToState(StoreOperand);
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//
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// Various states TODO.
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//
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#define TODOState(x) \
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BeginState(x): [[fallthrough]];
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@ -1100,6 +1141,10 @@ void ProcessorBase::did_chk(bool was_under, bool was_over) {
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}
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}
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void ProcessorBase::did_scc(bool did_set_ff) {
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state_ = did_set_ff ? Scc_Dn_did_set : Scc_Dn_did_not_set;
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}
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// MARK: - External state.
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template <class BusHandler, bool dtack_is_implicit, bool permit_overrun, bool signal_will_perform>
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@ -102,6 +102,7 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
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template <typename IntT> void did_mulu(IntT) {}
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template <typename IntT> void did_muls(IntT) {}
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inline void did_chk(bool, bool);
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inline void did_scc(bool);
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inline void did_shift(int) {}
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template <bool did_overflow> void did_divu(uint32_t, uint32_t) {}
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template <bool did_overflow> void did_divs(int32_t, int32_t) {}
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