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Further improve exposition.
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@ -281,13 +281,36 @@ struct ProcessorStorage {
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// Flags aplenty.
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MOS6502Esque::LazyFlags flags;
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uint8_t mx_flags[2] = {1, 1}; // [0] = m; [1] = x. In both cases either `0` or `1`; `1` => 8-bit.
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uint16_t m_masks[2] = {0xff00, 0x00ff}; // [0] = src mask (i.e. that which is unaffected by an operation); [1] = dst mask (i.e. 0xffff ^ src mask).
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uint16_t x_mask = 0x00ff; // A mask representing the current size of the index registers. Equivalent to m_masks[1].
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uint16_t e_masks[2] = {0xff00, 0x00ff}; // Akin to m_masks, but set as per emulation mode.
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int m_shift = 0; // How far to shift memory/A to align its sign bit with that of the flags register. i.e. 8 for 16-bit mode, 0 for 8-bit mode.
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int x_shift = 0; // m_shift equivalent for X and Y.
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bool emulation_flag = true; // The emulation flag; true = in emulation mode.
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// [0] = m; [1] = x. In both cases either `0` or `1`; `1` => 8-bit.
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uint8_t mx_flags[2] = {1, 1};
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// Used to determine which parts of a register are currently in use, as a function
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// of the M flag.
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//
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// [0] = src mask (i.e. that which is unaffected by an operation);
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// [1] = dst mask (i.e. 0xffff ^ src mask).
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//
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// e.g. a LDA from the value Q would prima facie leave A as equal to:
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// (A & m_masks[0]) | (Q & m_masks[1]);
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uint16_t m_masks[2] = {0xff00, 0x00ff};
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// A mask representing the current size of the index registers.
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// Equivalent in meaning to m_masks[1] but representative of the X flag.
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uint16_t x_mask = 0x00ff;
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// Akin to m_masks, but a function of emulation mode; used primarily for address calculation.
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uint16_t e_masks[2] = {0xff00, 0x00ff};
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// How far to shift memory/A to align its sign bit with that of the flags register.
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// i.e. 8 for 16-bit mode, 0 for 8-bit mode.
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int m_shift = 0;
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// m_shift equivalent for X and Y.
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int x_shift = 0;
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// The emulation flag; true = in emulation mode.
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bool emulation_flag = true;
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// The offset for direct addressing (i.e. outside of emulation mode).
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uint16_t direct = 0;
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