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Adds concept of time, captured port handler.
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@ -20,18 +20,27 @@ class PortHandler {
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enum class Personality {
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// The 6526, used in machines such as the C64, has a BCD time-of-day clock.
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Model6526,
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P6526,
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// The 8250, used in the Amiga, provides a binary time-of-day clock.
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Model8250,
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P8250,
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};
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template <typename BusHandlerT, Personality personality> class MOS6526 {
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template <typename PortHandlerT, Personality personality> class MOS6526 {
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public:
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MOS6526(PortHandlerT &port_handler) noexcept : port_handler_(port_handler) {}
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MOS6526(const MOS6526 &) = delete;
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/// Writes @c value to the register at @c address. Only the low two bits of the address are decoded.
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void write(int address, uint8_t value);
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/// Fetches the value of the register @c address. Only the low two bits of the address are decoded.
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uint8_t read(int address);
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/// Runs for a specified number of half cycles.
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void run_for(const HalfCycles half_cycles);
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private:
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PortHandlerT &port_handler_;
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};
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}
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@ -14,13 +14,21 @@ namespace MOS6526 {
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template <typename BusHandlerT, Personality personality>
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void MOS6526<BusHandlerT, personality>::write(int address, uint8_t value) {
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(void)address;
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(void)value;
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}
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template <typename BusHandlerT, Personality personality>
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uint8_t MOS6526<BusHandlerT, personality>::read(int address) {
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(void)address;
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return 0xff;
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}
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template <typename BusHandlerT, Personality personality>
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void MOS6526<BusHandlerT, personality>::run_for(const HalfCycles half_cycles) {
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(void)half_cycles;
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}
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}
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}
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@ -12,6 +12,8 @@
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#include "../../Processors/68000/68000.hpp"
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#include "../../Components/6526/6526.hpp"
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#include "../../Analyser/Static/Amiga/Target.hpp"
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#include "../Utility/MemoryPacker.hpp"
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@ -26,7 +28,9 @@ class ConcreteMachine:
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public Machine {
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public:
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ConcreteMachine(const Analyser::Static::Amiga::Target &target, const ROMMachine::ROMFetcher &rom_fetcher) :
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mc68000_(*this)
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mc68000_(*this),
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cia1_(cia1_handler_),
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cia2_(cia2_handler_)
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{
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(void)target;
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@ -65,16 +69,20 @@ class ConcreteMachine:
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// MARK: - MC68000::BusHandler.
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using Microcycle = CPU::MC68000::Microcycle;
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HalfCycles perform_bus_operation(const CPU::MC68000::Microcycle &cycle, int) {
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// Do nothing if no address is exposed.
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if(!(cycle.operation & (Microcycle::NewAddress | Microcycle::SameAddress))) return HalfCycles(0);
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// Otherwise, intended 1-2 step here is:
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// Intended 1-2 step here is:
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//
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// (1) determine when this CPU access will be scheduled;
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// (2) do all the other actions prior to this CPU access being scheduled.
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//
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// (or at least enqueue them, JIT-wise).
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// Advance time.
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cia1_.run_for(cycle.length);
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cia2_.run_for(cycle.length);
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// Do nothing if no address is exposed.
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if(!(cycle.operation & (Microcycle::NewAddress | Microcycle::SameAddress))) return HalfCycles(0);
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// TODO: interrupt acknowledgement.
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// Grab the target address to pick a memory source.
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@ -130,6 +138,17 @@ class ConcreteMachine:
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}
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}
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// MARK: - CIAs.
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struct CIA1Handler: public MOS::MOS6526::PortHandler {
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} cia1_handler_;
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struct CIA2Handler: public MOS::MOS6526::PortHandler {
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} cia2_handler_;
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MOS::MOS6526::MOS6526<CIA1Handler, MOS::MOS6526::Personality::P8250> cia1_;
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MOS::MOS6526::MOS6526<CIA2Handler, MOS::MOS6526::Personality::P8250> cia2_;
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// MARK: - MachineTypes::ScanProducer.
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void set_scan_target(Outputs::Display::ScanTarget *scan_target) final {
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