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Merge pull request #1255 from TomHarte/CGAClock

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Revise CGA clock rate downward.
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Thomas Harte 2023-12-07 12:28:44 -05:00 committed by GitHub
commit 48d1fa7eab
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1 changed files with 8 additions and 6 deletions
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14
Machines/PCCompatible/CGA.hpp
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@ -30,11 +30,12 @@ class CGA {
void run_for(Cycles cycles) {
// Input rate is the PIT rate of 1,193,182 Hz.
// CGA is clocked at the real oscillator rate of 14 times that.
// But there's also an internal divide by 8 to align to the fetch clock.
full_clock_ += 7 * cycles.as<int>();
// CGA is clocked at the real oscillator rate of 12 times that.
// But there's also an internal divide by 8 to align to the 80-cfetch clock.
// ... and 12/8 = 3/2.
full_clock_ += 3 * cycles.as<int>();
const int modulo = 4 * outputter_.clock_divider;
const int modulo = 2 * outputter_.clock_divider;
crtc_.run_for(Cycles(full_clock_ / modulo));
full_clock_ %= modulo;
}
@ -88,9 +89,10 @@ class CGA {
void set_scan_target(Outputs::Display::ScanTarget *scan_target) {
outputter_.crt.set_scan_target(scan_target);
}
Outputs::Display::ScanStatus get_scaled_scan_status() const {
return outputter_.crt.get_scaled_scan_status() * 4.0f / (7.0f * 8.0f);
// The CRT is always handed data at the full CGA pixel clock rate, so just
// divide by 12 to get back to the rate that run_for is being called at.
return outputter_.crt.get_scaled_scan_status() / 12.0f;
}
private: