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https://github.com/TomHarte/CLK.git
synced 2024-06-25 18:30:07 +00:00
Throw less.
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0e4615564d
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@ -418,7 +418,7 @@ struct OperationMapper {
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if constexpr (((partial >> 22) & 0b111'111) == 0b000'000) {
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if constexpr (((partial >> 22) & 0b111'111) == 0b000'000) {
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// This implementation provides only eight bits baked into the template parameters so
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// This implementation provides only eight bits baked into the template parameters so
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// an additional dynamic test is required to check whether this is really, really MUL or MLA.
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// an additional dynamic test is required to check whether this is really, really MUL or MLA.
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if(((instruction >> 4) & 0b1111) == 0b1001) {
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if((instruction & 0b1111'0000) == 0b1001'0000) {
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scheduler.template perform<i>(Multiply(instruction));
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scheduler.template perform<i>(Multiply(instruction));
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return;
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return;
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}
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}
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@ -426,9 +426,6 @@ struct OperationMapper {
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// Data processing; cf. p.17.
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// Data processing; cf. p.17.
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if constexpr (((partial >> 26) & 0b11) == 0b00) {
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if constexpr (((partial >> 26) & 0b11) == 0b00) {
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// TODO: This decoding technically requires that either b4 is 0 or, failing that, that b7 is 0.
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// i.e. b4 and b7 set should be rejected. Which is not quite fully tested by the multiply
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// condition above.
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scheduler.template perform<i>(DataProcessing(instruction));
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scheduler.template perform<i>(DataProcessing(instruction));
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return;
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return;
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}
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}
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@ -242,6 +242,7 @@ struct Interrupts {
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bool read(uint32_t address, uint8_t &value) const {
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bool read(uint32_t address, uint8_t &value) const {
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const auto target = address & AddressMask;
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const auto target = address & AddressMask;
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value = 0xff;
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switch(target) {
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switch(target) {
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default:
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default:
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logger.error().append("Unrecognised IOC read from %08x", address);
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logger.error().append("Unrecognised IOC read from %08x", address);
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@ -317,7 +318,7 @@ struct Interrupts {
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return true;
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return true;
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}
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}
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return false;
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return true;
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}
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}
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bool write(uint32_t address, uint8_t value) {
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bool write(uint32_t address, uint8_t value) {
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@ -423,7 +424,7 @@ struct Interrupts {
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return true;
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return true;
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}
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}
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return false;
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return true;
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}
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}
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Interrupts() {
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Interrupts() {
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@ -482,7 +483,7 @@ struct Memory {
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template <typename IntT>
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template <typename IntT>
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bool write(uint32_t address, IntT source, InstructionSet::ARM::Mode mode, bool) {
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bool write(uint32_t address, IntT source, InstructionSet::ARM::Mode mode, bool) {
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if(mode == InstructionSet::ARM::Mode::User && address < 0x2000000) {
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if(mode == InstructionSet::ARM::Mode::User && address >= 0x2000000) {
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return false;
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return false;
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}
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}
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@ -507,7 +508,7 @@ struct Memory {
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page_size_ = PageSize((address >> 2) & 3);
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page_size_ = PageSize((address >> 2) & 3);
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logger.info().append("MEMC Control: %08x -> OS:%d sound:%d video:%d refresh:%d high:%d low:%d size:%d", address, os_mode_, sound_dma_enable_, video_dma_enable_, dynamic_ram_refresh_, high_rom_access_time_, low_rom_access_time_, page_size_);
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logger.info().append("MEMC Control: %08x -> OS:%d sound:%d video:%d refresh:%d high:%d low:%d size:%d", address, os_mode_, sound_dma_enable_, video_dma_enable_, dynamic_ram_refresh_, high_rom_access_time_, low_rom_access_time_, page_size_);
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update_mapping();
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map_dirty_ = true;
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return true;
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return true;
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} else {
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} else {
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@ -516,7 +517,6 @@ struct Memory {
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break;
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break;
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case Zone::LogicallyMappedRAM: {
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case Zone::LogicallyMappedRAM: {
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update_mapping();
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const auto item = logical_ram<IntT, false>(address, mode);
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const auto item = logical_ram<IntT, false>(address, mode);
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if(!item) {
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if(!item) {
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return false;
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return false;
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@ -540,9 +540,9 @@ struct Memory {
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return true;
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return true;
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case Zone::AddressTranslator:
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case Zone::AddressTranslator:
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printf("Translator write at %08x\n", address);
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printf("Translator write at %08x; replaces %08x\n", address, pages_[address & 0x7f]);
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pages_[address & 0x7f] = address;
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pages_[address & 0x7f] = address;
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// update_mapping();
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map_dirty_ = true;
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break;
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break;
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default:
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default:
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@ -555,12 +555,7 @@ struct Memory {
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template <typename IntT>
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template <typename IntT>
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bool read(uint32_t address, IntT &source, InstructionSet::ARM::Mode mode, bool) {
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bool read(uint32_t address, IntT &source, InstructionSet::ARM::Mode mode, bool) {
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// Unaligned addresses are presented on the bus, but in an Archimedes
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if(mode == InstructionSet::ARM::Mode::User && address >= 0x2000000) {
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// the bus will ignore the low two bits.
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if constexpr (std::is_same_v<IntT, uint32_t>) {
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address &= static_cast<uint32_t>(~3);
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}
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if(mode == InstructionSet::ARM::Mode::User && address < 0x2000000) {
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return false;
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return false;
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}
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}
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@ -616,11 +611,6 @@ struct Memory {
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return true;
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return true;
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}
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}
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Memory() {
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// Install initial logical memory map.
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update_mapping();
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}
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bool tick_timers() {
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bool tick_timers() {
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return ioc_.tick_timers();
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return ioc_.tick_timers();
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}
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}
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@ -694,9 +684,17 @@ struct Memory {
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uint8_t protection_level = 0;
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uint8_t protection_level = 0;
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};
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};
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std::array<MappedPage, 8192> mapping_;
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std::array<MappedPage, 8192> mapping_;
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bool map_dirty_ = true;
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template <typename IntT, bool is_read>
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template <typename IntT, bool is_read>
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IntT *logical_ram(uint32_t address, InstructionSet::ARM::Mode mode) {
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IntT *logical_ram(uint32_t address, InstructionSet::ARM::Mode mode) {
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// Possibly TODO: this recompute-if-dirty flag is supposed to ameliorate for an expensive
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// mapping process. It can be eliminated when the process is improved.
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if(map_dirty_) {
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update_mapping();
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map_dirty_ = false;
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}
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address = aligned<IntT>(address);
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address = aligned<IntT>(address);
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address &= 0x1ff'ffff;
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address &= 0x1ff'ffff;
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size_t page;
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size_t page;
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@ -751,12 +749,6 @@ struct Memory {
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}
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}
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void update_mapping() {
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void update_mapping() {
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// static int c = 0;
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// ++c;
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// if(c == 662) {
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// printf("");
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// }
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// For each physical page, project it into logical space.
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// For each physical page, project it into logical space.
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switch(page_size_) {
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switch(page_size_) {
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default:
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default:
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@ -765,8 +757,6 @@ struct Memory {
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case PageSize::kb16: update_mapping<PageSize::kb16>(); break;
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case PageSize::kb16: update_mapping<PageSize::kb16>(); break;
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case PageSize::kb32: update_mapping<PageSize::kb32>(); break;
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case PageSize::kb32: update_mapping<PageSize::kb32>(); break;
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}
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}
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// logger.info().append("Updated logical RAM mapping [%d]", c);
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}
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}
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template <PageSize size>
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template <PageSize size>
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@ -834,7 +824,7 @@ struct Memory {
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break;
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break;
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}
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}
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printf("%08x => logical %d -> physical %d\n", page, logical, (physical >> 15));
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printf("%08x => physical %d -> logical %d\n", page, (physical >> 15), logical);
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// TODO: consider clashes.
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// TODO: consider clashes.
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// TODO: what if there's less than 4mb present?
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// TODO: what if there's less than 4mb present?
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@ -914,11 +904,11 @@ class ConcreteMachine:
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static bool log = false;
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static bool log = false;
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// if(executor_.pc() == 0x03802b40) {
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if(executor_.pc() == 0x0380214c) {
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// printf("");
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printf("");
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// }
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}
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// log |= (executor_.pc() > 0x02000000 && executor_.pc() < 0x02000078);
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// log |= (executor_.pc() > 0x02000000 && executor_.pc() < 0x02000078);
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log |= executor_.pc() == 0x03810398;
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// log |= executor_.pc() == 0x03811eb4;
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// log |= (executor_.pc() > 0x03801000);
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// log |= (executor_.pc() > 0x03801000);
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// log &= executor_.pc() != 0x03801a0c;
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// log &= executor_.pc() != 0x03801a0c;
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@ -943,6 +933,7 @@ class ConcreteMachine:
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}
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}
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info.append("]");
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info.append("]");
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}
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}
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// logger.info().append("%08x: %08x", executor_.pc(), instruction);
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InstructionSet::ARM::execute(instruction, executor_);
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InstructionSet::ARM::execute(instruction, executor_);
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// if(
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// if(
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