6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-23 03:32:32 +00:00
Code Issues Projects Releases Wiki Activity

Add missing prefetch to BSET, BCHG, BCLR.

Browse Source
This commit is contained in:
Thomas Harte 2022-05-21 21:05:05 -04:00
parent 4b35899a12
commit 4993801741
1 changed files with 2 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
View File

@ -1543,6 +1543,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
Prefetch();
IdleBus(1 + dynamic_instruction_length_);
registers_[instruction_.reg(1)] = operand_[1];
MoveToState(Decode);
@ -1555,6 +1556,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
>(
instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
Prefetch();
IdleBus(2 + dynamic_instruction_length_);
registers_[instruction_.reg(1)] = operand_[1];
MoveToState(Decode);