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Add missing prefetch to BSET, BCHG, BCLR.
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@ -1543,6 +1543,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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Prefetch();
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IdleBus(1 + dynamic_instruction_length_);
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registers_[instruction_.reg(1)] = operand_[1];
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MoveToState(Decode);
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@ -1555,6 +1556,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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Prefetch();
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IdleBus(2 + dynamic_instruction_length_);
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registers_[instruction_.reg(1)] = operand_[1];
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MoveToState(Decode);
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