From 4a40581deb59b7448db5787c03c27d4d6cd5ae38 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Tue, 17 May 2022 16:10:20 -0400 Subject: [PATCH] Completes performance of NBCD D0. --- .../68000ComparativeTests.mm | 2 +- Processors/68000Mk2/68000Mk2.hpp | 10 ++- .../Implementation/68000Mk2Implementation.hpp | 77 ++++++++++--------- .../Implementation/68000Mk2Storage.hpp | 70 ++++++++++++----- 4 files changed, 98 insertions(+), 61 deletions(-) diff --git a/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm b/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm index c581ffb96..157113aa6 100644 --- a/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm +++ b/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm @@ -181,7 +181,7 @@ struct Test68000 { // This is the test class for 68000 execution. struct Test68000: public CPU::MC68000Mk2::BusHandler { std::array ram; - CPU::MC68000Mk2::Processor processor; + CPU::MC68000Mk2::Processor processor; std::function comparitor; Test68000() : processor(*this) {} diff --git a/Processors/68000Mk2/68000Mk2.hpp b/Processors/68000Mk2/68000Mk2.hpp index f8277128f..4f4eddad5 100644 --- a/Processors/68000Mk2/68000Mk2.hpp +++ b/Processors/68000Mk2/68000Mk2.hpp @@ -13,8 +13,6 @@ #include "../../Numeric/RegisterSizes.hpp" #include "../../InstructionSets/M68k/RegisterSet.hpp" -#include "Implementation/68000Mk2Storage.hpp" - namespace CPU { namespace MC68000Mk2 { @@ -361,6 +359,14 @@ struct State { InstructionSet::M68k::RegisterSet registers; }; +} +} + +#include "Implementation/68000Mk2Storage.hpp" + +namespace CPU { +namespace MC68000Mk2 { + /*! Provides an emulation of the 68000 with accurate bus logic via the @c BusHandler, subject to the following template parameters: diff --git a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp index 620b4f24f..9e214ba53 100644 --- a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp +++ b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp @@ -60,31 +60,7 @@ void Processor> 3; \ + MoveToState(operand_flags_ & 0x0c ? State::StoreOperand : State::Decode) + case State::Perform_np: InstructionSet::M68k::perform( instruction_, operand_[0], operand_[1], status_, *static_cast(this)); Prefetch(); // np - next_operand_ = 0; - MoveToState(operand_flags_ & 0x0c ? State::StoreOperand : State::Decode); + MoveToWritePhase(); break; case State::Perform_np_n: @@ -253,10 +254,10 @@ void Processor void did_mulu(IntT) {} template void did_muls(IntT) {} - void did_chk([[maybe_unused]] bool was_under, [[maybe_unused]] bool was_over) {} - void did_shift([[maybe_unused]] int bit_count) {} - template void did_divu([[maybe_unused]] uint32_t dividend, [[maybe_unused]] uint32_t divisor) {} - template void did_divs([[maybe_unused]] int32_t dividend, [[maybe_unused]] int32_t divisor) {} - void did_bit_op([[maybe_unused]] int bit_position) {} + void did_chk(bool, bool) {} + void did_shift(int) {} + template void did_divu(uint32_t, uint32_t) {} + template void did_divs(int32_t, int32_t) {} + void did_bit_op(int) {} inline void did_update_status(); - template void complete_bcc(bool matched_condition, IntT offset) {} - void complete_dbcc(bool matched_condition, bool overflowed, int16_t offset) {} - void bsr(uint32_t offset) {} - void jsr(uint32_t address) {} - void jmp(uint32_t address) {} + template void complete_bcc(bool, IntT) {} + void complete_dbcc(bool, bool, int16_t) {} + void bsr(uint32_t) {} + void jsr(uint32_t) {} + void jmp(uint32_t) {} void rtr() {} void rte() {} void rts() {} void stop() {} void reset() {} - void link(Preinstruction instruction, uint32_t offset) {} - void unlink(uint32_t &address) {} - void pea(uint32_t address) {} - void move_to_usp(uint32_t address) {} - void move_from_usp(uint32_t &address) {} - void tas(Preinstruction instruction, uint32_t address) {} - template void movep(Preinstruction instruction, uint32_t source, uint32_t dest) {} - template void movem_toM(Preinstruction instruction, uint32_t mask, uint32_t address) {} - template void movem_toR(Preinstruction instruction, uint32_t mask, uint32_t address) {} - template void raise_exception([[maybe_unused]] int vector) {} + void link(Preinstruction, uint32_t) {} + void unlink(uint32_t &) {} + void pea(uint32_t) {} + void move_to_usp(uint32_t) {} + void move_from_usp(uint32_t &) {} + void tas(Preinstruction, uint32_t) {} + template void movep(Preinstruction, uint32_t, uint32_t) {} + template void movem_toM(Preinstruction, uint32_t, uint32_t) {} + template void movem_toR(Preinstruction, uint32_t, uint32_t) {} + template void raise_exception(int) {} + + // Some microcycles that will be modified as required and used in the main loop; + // the semantics of a switch statement make in-place declarations awkward and + // some of these may persist across multiple calls to run_for. + Microcycle idle{0}; + + // Read a data word. + Microcycle read_word_data_announce { + Microcycle::Read | Microcycle::NewAddress | Microcycle::IsData + }; + Microcycle read_word_data { + Microcycle::Read | Microcycle::SameAddress | Microcycle::SelectWord | Microcycle::IsData + }; + + // Read a program word. All accesses via the program counter are word sized. + Microcycle read_program_announce { + Microcycle::Read | Microcycle::NewAddress | Microcycle::IsProgram + }; + Microcycle read_program { + Microcycle::Read | Microcycle::SameAddress | Microcycle::SelectWord | Microcycle::IsProgram + }; + + // Holding spot when awaiting DTACK/etc. + Microcycle awaiting_dtack; }; }