From 4b1324de7756f3b823b4be4ae16b21c4f4819385 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 28 Apr 2019 15:52:58 -0400 Subject: [PATCH] Takes a run at TRAPV. ... to leave 1466 as the unimplemented count. --- .../68000/Implementation/68000Implementation.hpp | 10 ++++++++++ Processors/68000/Implementation/68000Storage.cpp | 8 ++++++++ Processors/68000/Implementation/68000Storage.hpp | 2 +- 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/Processors/68000/Implementation/68000Implementation.hpp b/Processors/68000/Implementation/68000Implementation.hpp index 2b73a16e1..af467a1aa 100644 --- a/Processors/68000/Implementation/68000Implementation.hpp +++ b/Processors/68000/Implementation/68000Implementation.hpp @@ -953,6 +953,16 @@ template void Proces program_counter_.full -= 2; } break; + case Operation::TRAPV: { + if(overflow_flag_) { + // Select the trap steps as next; the initial microcycle should be 4 cycles long. + bus_program = trap_steps_; + bus_program->microcycle.length = HalfCycles(0); + populate_trap_steps(7, get_status()); + program_counter_.full -= 4; + } + } break; + case Operation::CHK: { const bool is_under = int16_t(active_program_->destination->halves.low.full) < 0; const bool is_over = int16_t(active_program_->destination->halves.low.full) > int16_t(active_program_->source->halves.low.full); diff --git a/Processors/68000/Implementation/68000Storage.cpp b/Processors/68000/Implementation/68000Storage.cpp index 314d1924e..1f5cf2ddc 100644 --- a/Processors/68000/Implementation/68000Storage.cpp +++ b/Processors/68000/Implementation/68000Storage.cpp @@ -447,6 +447,7 @@ struct ProcessorStorageConstructor { MOVEUSP, // Maps a direction and register to a MOVE [to/from] USP. TRAP, // Maps to a TRAP. + TRAPV, // Maps to a TRAPV. CHK, // Maps to a CHK. NOP, // Maps to a NOP. @@ -665,6 +666,7 @@ struct ProcessorStorageConstructor { {0xfff0, 0x4e60, Operation::MOVEAl, Decoder::MOVEUSP}, // 6-21 (p475) {0xfff0, 0x4e40, Operation::TRAP, Decoder::TRAP}, // 4-188 (p292) + {0xffff, 0x4e76, Operation::TRAPV, Decoder::TRAPV}, // 4-191 (p295) {0xf1c0, 0x4180, Operation::CHK, Decoder::CHK}, // 4-69 (p173) {0xffff, 0x4e77, Operation::RTE_RTR, Decoder::RTE_RTR}, // 4-168 (p272) [RTR] @@ -3213,6 +3215,12 @@ struct ProcessorStorageConstructor { op(); } break; + case Decoder::TRAPV: { + op(Action::None, seq("np")); + op(Action::PerformOperation); + op(); + } break; + case Decoder::CHK: { storage_.instructions[instruction].set_destination(storage_, Dn, data_register); storage_.instructions[instruction].set_source(storage_, ea_mode, ea_register); diff --git a/Processors/68000/Implementation/68000Storage.hpp b/Processors/68000/Implementation/68000Storage.hpp index 62e8d7945..76760f4b5 100644 --- a/Processors/68000/Implementation/68000Storage.hpp +++ b/Processors/68000/Implementation/68000Storage.hpp @@ -104,7 +104,7 @@ class ProcessorStorage { RTE_RTR, - TRAP, + TRAP, TRAPV, CHK, EXG, SWAP,