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Made first attempt to use the horizontal counter for something; here for sync timing only, even though I've gone exclusively with '81-style timing for now.

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This commit is contained in:
Thomas Harte 2017-06-12 22:28:30 -04:00
parent aed2827e7b
commit 4c5261bfa0
1 changed files with 17 additions and 3 deletions
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18
Machines/ZX8081/ZX8081.cpp
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@ -27,7 +27,20 @@ Machine::Machine() :
}
int Machine::perform_machine_cycle(const CPU::Z80::MachineCycle &cycle) {
int previous_counter = horizontal_counter_;
horizontal_counter_ += cycle.length;
if(previous_counter < 16 && horizontal_counter_ >= 16) {
video_->run_for_cycles(16 - previous_counter);
set_hsync(true);
video_->run_for_cycles(horizontal_counter_ - 16);
} else if(previous_counter < 32 && horizontal_counter_ >= 32) {
video_->run_for_cycles(32 - previous_counter);
set_hsync(false);
video_->run_for_cycles(horizontal_counter_ - 32);
} else {
video_->run_for_cycles(cycle.length);
}
// tape_player_.run_for_cycles(cycle.length);
uint16_t refresh = 0;
@ -55,13 +68,14 @@ int Machine::perform_machine_cycle(const CPU::Z80::MachineCycle &cycle) {
} break;
case CPU::Z80::BusOperation::Interrupt:
set_hsync(true);
// set_hsync(true);
line_counter_ = (line_counter_ + 1) & 7;
*cycle.value = 0xff;
horizontal_counter_ = 0; // TODO: more than this?
break;
case CPU::Z80::BusOperation::ReadOpcode:
set_hsync(false);
// set_hsync(false);
// The ZX80 and 81 signal an interrupt while refresh is active and bit 6 of the refresh
// address is low. The Z80 signals a refresh, providing the refresh address during the