From 4e34727195f3e788acafcecd3fa9e3fbd84cfec5 Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Sun, 22 May 2022 16:14:03 -0400
Subject: [PATCH] Fully implement TAS.

---
 .../68000ComparativeTests.mm                  |  2 +-
 .../Implementation/68000Mk2Implementation.hpp | 26 +++++++++++++++++--
 .../Implementation/68000Mk2Storage.hpp        |  9 +++++++
 3 files changed, 34 insertions(+), 3 deletions(-)

diff --git a/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm b/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm
index 019381314..19f3aaf9d 100644
--- a/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm	
+++ b/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm	
@@ -188,7 +188,7 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
 //		@"rts.json",
 		@"swap.json",
 		@"tas.json",
-//		@"tst.json",
+		@"tst.json",
 	]];
 //	_testSet = [NSSet setWithArray:@[@"TAS 4ac0"]];
 }
diff --git a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
index 4b2eb5bc1..3649f09b6 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
@@ -1921,9 +1921,31 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 		// TAS
 		//
 		BeginState(TAS):
+			// Populate all addresses.
+			tas_cycles[0].address = tas_cycles[1].address =
+			tas_cycles[2].address =
+			tas_cycles[3].address = tas_cycles[4].address = &effective_address_[0].l;
 
-			// TODO: use the specialised TAS bus cycle; five parts.
-//			PerformBusOperation
+			// Populate values to the relevant subset.
+			tas_cycles[0].value = tas_cycles[1].value =
+			tas_cycles[3].value = tas_cycles[4].value = &operand_[0].low;
+
+			// First two parts: the read.
+			PerformBusOperation(tas_cycles[0]);
+			PerformBusOperation(tas_cycles[1]);
+
+			// Third part: processing time.
+			PerformBusOperation(tas_cycles[2]);
+
+			// Do the actual TAS operation.
+			status_.overflow_flag = status_.carry_flag = 0;
+			status_.zero_result = operand_[0].b;
+			status_.negative_flag = operand_[0].b & 0x80;
+
+			// Final parts: write back.
+			operand_[0].b |= 0x80;
+			PerformBusOperation(tas_cycles[3]);
+			PerformBusOperation(tas_cycles[4]);
 
 			Prefetch();
 		MoveToStateSpecific(Decode);
diff --git a/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp b/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
index 706e27c4d..b133a2d67 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
@@ -176,6 +176,15 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
 		Microcycle::Read | Microcycle::SameAddress | Microcycle::SelectWord | Microcycle::IsData
 	};
 
+	// TAS.
+	Microcycle tas_cycles[5] = {
+		{ Microcycle::Read | Microcycle::NewAddress | Microcycle::IsData },
+		{ Microcycle::Read | Microcycle::SameAddress | Microcycle::IsData | Microcycle::SelectByte },
+		{ Microcycle::SameAddress },
+		{ Microcycle::SameAddress | Microcycle::IsData },
+		{ Microcycle::SameAddress | Microcycle::IsData | Microcycle::SelectByte },
+	};
+
 	// Holding spot when awaiting DTACK/etc.
 	Microcycle awaiting_dtack;
 };