diff --git a/InstructionSets/PowerPC/Instruction.hpp b/InstructionSets/PowerPC/Instruction.hpp
index 9cbf907f7..155fe8dd3 100644
--- a/InstructionSets/PowerPC/Instruction.hpp
+++ b/InstructionSets/PowerPC/Instruction.hpp
@@ -149,13 +149,33 @@ enum class Operation: uint8_t {
 	extsbx, extshx, fabsx, faddx, faddsx, fcmpo, fcmpu, fctiwx, fctiwzx,
 	fdivx, fdivsx, fmaddx, fmaddsx, fmrx, fmsubx, fmsubsx, fmulx, fmulsx,
 	fnabsx, fnegx, fnmaddx, fnmaddsx, fnmsubx, fnmsubsx, frspx, fsubx, fsubsx,
-	icbi, isync, lbz, lbzu, lbzux, lbzx, lfd, lfdu, lfdux, lfdx, lfs, lfsu,
+	icbi, isync, lbz, lbzu,
+
+	/// Load byte and zero with update indexed.
+	///
+	/// rD()[24, 31] = [ rA()|0 + rB() ]; and rA() is set to the calculated address
+	/// i.e. if rA() is 0 then the value 0 is used, not the contents of r0.
+	/// The rest of rD is set to 0.
+	///
+	/// PowerPC defines rA=0 and rA=rD to be invalid forms; the MPC601
+	/// will suppress the update if rA=0 or rA=rD.
+	lbzux,
+
+	/// Load byte and zero indexed.
+	///
+	/// rD[24, 31] = [ (rA()|0) + rB() ]
+	/// i.e. if rA() is 0 then the value 0 is used, not the contents of r0.
+	/// The rest of rD is set to 0.
+	lbzx,
+
+	lfd, lfdu, lfdux, lfdx, lfs, lfsu,
 	lfsux, lfsx, lha, lhau, lhaux, lhax, lhbrx, lhz, lhzu, lhzux, lhzx, lmw,
 	lswi, lswx, lwarx, lwbrx, lwz, lwzu,
 
-	/// Load word and zero with Update Indexed.
+	/// Load word and zero with update indexed.
 	///
-	/// rD() = [ rA()|0 + rB() ]; and rA() is set to the calculated address.
+	/// rD() = [ rA()|0 + rB() ]; and rA() is set to the calculated address
+	/// i.e. if rA() is 0 then the value 0 is used, not the contents of r0.
 	///
 	/// PowerPC defines rA=0 and rA=rD to be invalid forms; the MPC601
 	/// will suppress the update if rA=0 or rA=rD.
@@ -163,7 +183,8 @@ enum class Operation: uint8_t {
 
 	/// Load word and zero indexed.
 	///
-	/// rD() = [ (rA()|0) + rB() ] i.e. if rA() is 0 then the value 0 is used, not the contents of r0.
+	/// rD() = [ (rA()|0) + rB() ]
+	/// i.e. if rA() is 0 then the value 0 is used, not the contents of r0.
 	lwzx,
 
 	mcrf, mcrfs, mcrxr,
diff --git a/OSBindings/Mac/Clock SignalTests/DingusdevPowerPCTests.mm b/OSBindings/Mac/Clock SignalTests/DingusdevPowerPCTests.mm
index eceb73f53..53138ec91 100644
--- a/OSBindings/Mac/Clock SignalTests/DingusdevPowerPCTests.mm	
+++ b/OSBindings/Mac/Clock SignalTests/DingusdevPowerPCTests.mm	
@@ -62,15 +62,18 @@ using namespace InstructionSet::PowerPC;
 				NSAssert(FALSE, @"Didn't handle %@", line);
 			break;
 
-			case Operation::lwzux:
-				XCTAssertEqualObjects(operation, @"lwzux");
-				[self testABDInstruction:instruction columns:columns testZero:YES];
+#define ABCz(x)	\
+			case Operation::x:	\
+				XCTAssertEqualObjects(operation, @#x);	\
+				[self testABDInstruction:instruction columns:columns testZero:YES];	\
 			break;
 
-			case Operation::lwzx:
-				XCTAssertEqualObjects(operation, @"lwzx");
-				[self testABDInstruction:instruction columns:columns testZero:YES];
-			break;
+			ABCz(lwzux);
+			ABCz(lwzx);
+			ABCz(lbzx);
+			ABCz(lbzux);
+
+#undef ABCz
 
 			case Operation::bcx:
 			case Operation::bclrx: