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Sought to ensure that Mode 1 interrupts aren't happening early. Which they seem not to be.

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Thomas Harte 2017-06-11 13:30:08 -04:00
parent 256ba4028b
commit 50be3a24fe
1 changed files with 7 additions and 2 deletions
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9
OSBindings/Mac/Clock SignalTests/Z80InterruptTests.swift
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@ -135,8 +135,13 @@ class Z80InterruptTests: XCTestCase {
machine.runForNumber(ofCycles: 4) machine.runForNumber(ofCycles: 4)
XCTAssertEqual(machine.value(for: .programCounter), 0x0102) XCTAssertEqual(machine.value(for: .programCounter), 0x0102)
// run for eleven more cycles to allow the IRQ to begin // run for twelve cycles and confirm that the IRQ has yet to begin
machine.runForNumber(ofCycles: 13) machine.runForNumber(ofCycles: 12)
XCTAssertNotEqual(machine.value(for: .programCounter), 0x38)
// run for one more cycles to allow the IRQ to begin
machine.runForNumber(ofCycles: 1)
// confirm that the PC is now at 0x38, that the old is on the stack and // confirm that the PC is now at 0x38, that the old is on the stack and
// that interrupts are now disabled // that interrupts are now disabled