1
0
mirror of https://github.com/TomHarte/CLK.git synced 2026-04-25 11:17:26 +00:00

Eliminates the optionality of a DPLL receiver.

This commit is contained in:
Thomas Harte
2020-01-12 17:45:02 -05:00
parent 8e3a618619
commit 514141f8c5
5 changed files with 16 additions and 28 deletions
+1 -2
View File
@@ -15,9 +15,8 @@ using namespace Storage::Disk;
Controller::Controller(Cycles clock_rate) :
clock_rate_multiplier_(128000000 / clock_rate.as_integral()),
clock_rate_(clock_rate.as_integral() * clock_rate_multiplier_),
pll_(100),
pll_(100, *this),
empty_drive_(new Drive(int(clock_rate.as_integral()), 1, 1)) {
pll_.set_delegate(this);
set_expected_bit_length(Time(1));
set_drive(empty_drive_);
}