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mirror of https://github.com/TomHarte/CLK.git synced 2024-06-25 18:30:07 +00:00

Adds a dummy interrupt control register.

This commit is contained in:
Thomas Harte 2021-07-22 16:09:32 -04:00
parent 3ee1fc544f
commit 56b62a5e49
3 changed files with 17 additions and 4 deletions

View File

@ -59,6 +59,7 @@ template <typename PortHandlerT, Personality personality> class MOS6526:
template <int port> void set_port_output();
template <int port> uint8_t get_port_input();
void update_interrupts();
};
}

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@ -27,6 +27,10 @@ template <int port> uint8_t MOS6526<BusHandlerT, personality>::get_port_input()
return (input & ~registers_.data_direction[port]) | (registers_.output[port] & registers_.data_direction[port]);
}
template <typename BusHandlerT, Personality personality>
void MOS6526<BusHandlerT, personality>::update_interrupts() {
}
template <typename BusHandlerT, Personality personality>
void MOS6526<BusHandlerT, personality>::write(int address, uint8_t value) {
address &= 0xf;
@ -51,6 +55,12 @@ void MOS6526<BusHandlerT, personality>::write(int address, uint8_t value) {
set_port_output<1>();
break;
// Interrupt control.
case 13:
registers_.interrupt_control_ = value;
update_interrupts();
break;
default:
printf("Unhandled 6526 write: %02x to %d\n", value, address);
assert(false);
@ -62,12 +72,13 @@ template <typename BusHandlerT, Personality personality>
uint8_t MOS6526<BusHandlerT, personality>::read(int address) {
address &= 0xf;
switch(address) {
case 0: return get_port_input<0>();
case 1: return get_port_input<1>();
case 0: return get_port_input<0>();
case 1: return get_port_input<1>();
case 13: return registers_.interrupt_control_;
case 2: case 3:
return registers_.data_direction[address - 2];
break;
return registers_.data_direction[address - 2];
default:
printf("Unhandled 6526 read from %d\n", address);

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@ -17,6 +17,7 @@ struct MOS6526Storage {
struct Registers {
uint8_t output[2] = {0, 0};
uint8_t data_direction[2] = {0, 0};
uint8_t interrupt_control_ = 0;
} registers_;
};