1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-07-06 01:28:57 +00:00

Fixed interlaced timing; switched to a more robust detector for horizontal sync; eliminated some test logging.

This commit is contained in:
Thomas Harte 2016-02-20 20:29:40 -05:00
parent 00f414d757
commit 574985f9a2
4 changed files with 11 additions and 17 deletions

View File

@ -565,7 +565,7 @@ inline void Machine::update_display()
*/
const unsigned int end_of_top = (first_graphics_line * cycles_per_line) + (_is_odd_field ? 64 : 0);
const unsigned int end_of_top = (first_graphics_line * cycles_per_line) - (_is_odd_field ? 0 : 64);
const unsigned int end_of_graphics = end_of_top + 256 * cycles_per_line;
// does the top region need to be output?

View File

@ -98,7 +98,8 @@ CRT::CRT() :
_is_receiving_sync(false),
_output_mutex(new std::mutex),
_visible_area(Rect(0, 0, 1, 1)),
_rasterPosition({.x = 0, .y = 0})
_rasterPosition({.x = 0, .y = 0}),
_sync_period(0)
{
construct_openGL();
}
@ -150,7 +151,6 @@ void CRT::advance_cycles(unsigned int number_of_cycles, unsigned int source_divi
number_of_cycles *= _time_multiplier;
bool is_output_run = ((type == Type::Level) || (type == Type::Data));
vsync_requested &= (_sync_capacitor_charge_level >= _sync_capacitor_charge_threshold);
while(number_of_cycles) {
@ -241,13 +241,6 @@ void CRT::advance_cycles(unsigned int number_of_cycles, unsigned int source_divi
_run_write_pointer = (_run_write_pointer + 1)%kCRTNumberOfFrames;
_run_builders[_run_write_pointer]->reset();
static int fc = 0;
fc++;
if(!(fc&15))
{
printf("H misses %d; v misses %d\n", _horizontal_flywheel->get_and_reset_number_of_surprises(), _vertical_flywheel->get_and_reset_number_of_surprises());
}
}
}
}
@ -260,10 +253,12 @@ void CRT::output_scan()
Scan *scan = &_scans[_next_scan];
bool this_is_sync = (scan->type == Type::Sync);
bool hsync_requested = !_is_receiving_sync && this_is_sync;
bool vsync_requested = _is_receiving_sync && !this_is_sync;
bool is_trailing_edge = (_is_receiving_sync && !this_is_sync);
bool hsync_requested = is_trailing_edge && (_sync_period < (_horizontal_flywheel->get_scan_period() >> 2));
bool vsync_requested = is_trailing_edge && (_sync_capacitor_charge_level >= _sync_capacitor_charge_threshold);
_is_receiving_sync = this_is_sync;
_sync_period = _is_receiving_sync ? (_sync_period + scan->number_of_cycles) : 0;
advance_cycles(scan->number_of_cycles, scan->source_divider, hsync_requested, vsync_requested, this_is_sync, scan->type, scan->tex_x, scan->tex_y);
}

View File

@ -264,6 +264,7 @@ class CRT {
bool _is_receiving_sync; // true if the CRT is currently receiving sync (i.e. this is for edge triggering of horizontal sync)
int _sync_capacitor_charge_level; // this charges up during times of sync and depletes otherwise; needs to hit a required threshold to trigger a vertical sync
int _sync_capacitor_charge_threshold; // this charges up during times of sync and depletes otherwise; needs to hit a required threshold to trigger a vertical sync
unsigned int _sync_period;
// the outer entry point for dispatching output_sync, output_blank, output_level and output_data
enum Type {

View File

@ -65,7 +65,7 @@ struct Flywheel
if(_counter < _sync_error_window || _counter > _expected_next_sync - _sync_error_window)
{
unsigned int time_now = (_counter < _sync_error_window) ? _expected_next_sync + _counter : _counter;
_expected_next_sync = (_expected_next_sync + _expected_next_sync + _expected_next_sync + time_now) >> 2;
_expected_next_sync = (3*_expected_next_sync + time_now) >> 2;
}
else
{
@ -73,13 +73,11 @@ struct Flywheel
if(_counter < _retrace_time + (_expected_next_sync >> 1))
{
_expected_next_sync = (_expected_next_sync + _standard_period + _sync_error_window) >> 1;
// _expected_next_sync+=;
_expected_next_sync = (3*_expected_next_sync + _standard_period + _sync_error_window) >> 2;
}
else
{
_expected_next_sync = (_expected_next_sync + _standard_period - _sync_error_window) >> 1;
// _expected_next_sync--;
_expected_next_sync = (3*_expected_next_sync + _standard_period - _sync_error_window) >> 2;
}
}
}