From cfafbfd141221e20f2853c9aa0b930639ad05178 Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Sat, 4 Jun 2022 15:20:38 -0400
Subject: [PATCH] Fix interrupt acknowledge cycle: signals and data size.

---
 .../Implementation/68000Mk2Implementation.hpp        | 12 ++++++------
 .../68000Mk2/Implementation/68000Mk2Storage.hpp      |  6 ++++++
 2 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
index 2d5dc60f7..faed7b03f 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
@@ -547,13 +547,14 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 
 			// Do the interrupt cycle, to obtain a vector.
 			temporary_address_.l = 0xffff'fff1 | uint32_t(captured_interrupt_level_ << 1);
-			SetupDataAccess(0, Microcycle::InterruptAcknowledge);
-			SetDataAddress(temporary_address_.l);
-			Access(temporary_value_.low);		// ni
+			interrupt_cycles[0].address = interrupt_cycles[1].address = &temporary_address_.l;
+			interrupt_cycles[0].value = interrupt_cycles[1].value = &temporary_value_.low;
+			PerformBusOperation(interrupt_cycles[0]);
+			CompleteAccess(interrupt_cycles[1]);		// ni
 
 			// If VPA is set, autovector.
 			if(vpa_) {
-				temporary_value_.w = uint16_t(InstructionSet::M68k::Exception::InterruptAutovectorBase - 1 + captured_interrupt_level_);
+				temporary_value_.b = uint8_t(InstructionSet::M68k::Exception::InterruptAutovectorBase - 1 + captured_interrupt_level_);
 			}
 
 			// TODO: if bus error is set, treat interrupt as spurious.
@@ -561,7 +562,6 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 			IdleBus(3);							// n- n
 
 			// Do the rest of the stack work.
-			SetupDataAccess(0, Microcycle::SelectWord);
 			SetDataAddress(registers_[15].l);
 
 			registers_[15].l -= 4;
@@ -575,7 +575,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 			SetupDataAccess(Microcycle::Read, Microcycle::SelectWord);
 			SetDataAddress(temporary_address_.l);
 
-			temporary_address_.l = uint32_t(temporary_value_.w << 2);
+			temporary_address_.l = uint32_t(temporary_value_.b << 2);
 			Access(program_counter_.high);		// nV
 
 			temporary_address_.l += 2;
diff --git a/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp b/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
index 358dceb2c..243c0c86b 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
@@ -210,6 +210,12 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
 	// Reset.
 	Microcycle reset_cycle { Microcycle::Reset, HalfCycles(248) };
 
+	// Interrupt acknowledge.
+	Microcycle interrupt_cycles[2] = {
+		{ Microcycle::InterruptAcknowledge | Microcycle::Read | Microcycle::NewAddress },
+		{ Microcycle::InterruptAcknowledge | Microcycle::Read | Microcycle::SameAddress | Microcycle::SelectByte },
+	};
+
 	// Holding spot when awaiting DTACK/etc.
 	Microcycle awaiting_dtack;
 };