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mirror of https://github.com/TomHarte/CLK.git synced 2026-04-26 03:29:40 +00:00

Corrects sampling of MREQ.

This commit is contained in:
Thomas Harte
2021-04-08 19:21:35 -04:00
parent cd787486d2
commit 57a7e0834f
2 changed files with 5 additions and 3 deletions
+4 -2
View File
@@ -164,6 +164,8 @@ struct PartialMachineCycle {
/// @returns A C-style array of the bus state at the beginning of each half cycle in this
/// partial machine cycle. Each element is a combination of bit masks from the Line enum;
/// bit set means line active, bit clear means line inactive. For the CLK line set means high.
///
/// @discussion This discrete sampling is prone to aliasing errors. Beware.
const uint8_t *bus_state() const {
switch(operation) {
@@ -191,10 +193,10 @@ struct PartialMachineCycle {
case Operation::Refresh: {
static constexpr uint8_t states[] = {
Line::CLK | Line::RFSH,
Line::RFSH | Line::MREQ,
Line::CLK | Line::RFSH | Line::MREQ,
Line::RFSH,
Line::CLK | Line::RFSH | Line::MREQ,
Line::RFSH | Line::MREQ,
Line::CLK | Line::RFSH,
Line::RFSH,
};