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https://github.com/TomHarte/CLK.git
synced 2026-04-26 03:29:40 +00:00
Corrects sampling of MREQ.
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@@ -164,6 +164,8 @@ struct PartialMachineCycle {
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/// @returns A C-style array of the bus state at the beginning of each half cycle in this
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/// partial machine cycle. Each element is a combination of bit masks from the Line enum;
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/// bit set means line active, bit clear means line inactive. For the CLK line set means high.
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///
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/// @discussion This discrete sampling is prone to aliasing errors. Beware.
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const uint8_t *bus_state() const {
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switch(operation) {
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@@ -191,10 +193,10 @@ struct PartialMachineCycle {
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case Operation::Refresh: {
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static constexpr uint8_t states[] = {
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Line::CLK | Line::RFSH,
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Line::RFSH | Line::MREQ,
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Line::CLK | Line::RFSH | Line::MREQ,
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Line::RFSH,
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Line::CLK | Line::RFSH | Line::MREQ,
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Line::RFSH | Line::MREQ,
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Line::CLK | Line::RFSH,
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Line::RFSH,
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};
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