diff --git a/Processors/68000/State/State.cpp b/Processors/68000/State/State.cpp
index a24dca4a2..ce718dec0 100644
--- a/Processors/68000/State/State.cpp
+++ b/Processors/68000/State/State.cpp
@@ -22,6 +22,7 @@ State::State(const ProcessorBase &src): State() {
 	registers.status = src.get_status();
 	registers.program_counter = src.program_counter_.full;
 	registers.prefetch = src.prefetch_queue_.full;
+	registers.instruction = src.decoded_instruction_.full;
 
 	// Inputs.
 	inputs.bus_interrupt_level = uint8_t(src.bus_interrupt_level_);
@@ -31,6 +32,23 @@ State::State(const ProcessorBase &src): State() {
 	inputs.bus_request = src.bus_request_;
 	inputs.bus_grant = false;	// TODO (within the 68000).
 	inputs.halt = src.halt_;
+
+	// TODO:
+	//	execution_state_
+	//	last_trace_flag_
+	//	pending_interrupt_level_
+	//	accepted_interrupt_level_
+	//	is_starting_interrupt_
+	//	dbcc_false_address_
+	//	next_word_
+	//	active_[program_/micro_op_/step_]
+
+	// Execution state.
+	execution_state.e_clock_phase = src.e_clock_phase_.as<uint8_t>();
+	execution_state.effective_address[0] = src.effective_address_[0].full;
+	execution_state.effective_address[1] = src.effective_address_[1].full;
+	execution_state.source_data = src.source_bus_data_[0].full;
+	execution_state.destination_data = src.destination_bus_data_[0].full;
 }
 
 void State::apply(ProcessorBase &target) {
@@ -54,6 +72,7 @@ State::Registers::Registers() {
 		DeclareField(status);
 		DeclareField(program_counter);
 		DeclareField(prefetch);
+		DeclareField(instruction);
 	}
 }
 
@@ -71,5 +90,9 @@ State::Inputs::Inputs() {
 
 State::ExecutionState::ExecutionState() {
 	if(needs_declare()) {
+		DeclareField(e_clock_phase);
+		DeclareField(effective_address);
+		DeclareField(source_data);
+		DeclareField(destination_data);
 	}
 }
diff --git a/Processors/68000/State/State.hpp b/Processors/68000/State/State.hpp
index 4ed4fb14e..fa1aa1d3f 100644
--- a/Processors/68000/State/State.hpp
+++ b/Processors/68000/State/State.hpp
@@ -34,6 +34,7 @@ struct State: public Reflection::StructImpl<State> {
 		uint16_t status;
 		uint32_t program_counter;
 		uint32_t prefetch;
+		uint16_t instruction;
 
 		Registers();
 	} registers;
@@ -60,6 +61,11 @@ struct State: public Reflection::StructImpl<State> {
 		obviously doesn't.
 	*/
 	struct ExecutionState: public Reflection::StructImpl<ExecutionState> {
+		uint8_t e_clock_phase;
+		uint32_t effective_address[2];
+		uint32_t source_data;
+		uint32_t destination_data;
+
 		ExecutionState();
 	} execution_state;