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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-26 08:49:37 +00:00

Ensures console output only in debug builds.

This commit is contained in:
Thomas Harte 2018-10-18 21:16:56 -04:00
parent 512f085891
commit 57f03e660c

View File

@ -19,6 +19,7 @@
#include "../../ClockReceiver/ForceInline.hpp" #include "../../ClockReceiver/ForceInline.hpp"
#include "../../Outputs/Speaker/Implementation/LowpassSpeaker.hpp" #include "../../Outputs/Speaker/Implementation/LowpassSpeaker.hpp"
#include "../../Outputs/Log.hpp"
#include "../../Analyser/Static/Sega/Target.hpp" #include "../../Analyser/Static/Sega/Target.hpp"
@ -177,11 +178,11 @@ class ConcreteMachine:
case CPU::Z80::PartialMachineCycle::Input: case CPU::Z80::PartialMachineCycle::Input:
switch(address & 0xc1) { switch(address & 0xc1) {
case 0x00: case 0x00:
printf("TODO: [input] memory control\n"); LOG("TODO: [input] memory control");
*cycle.value = 0xff; *cycle.value = 0xff;
break; break;
case 0x01: case 0x01:
printf("TODO: [input] I/O port control\n"); LOG("TODO: [input] I/O port control");
*cycle.value = 0xff; *cycle.value = 0xff;
break; break;
case 0x40: case 0x40:
@ -212,7 +213,7 @@ class ConcreteMachine:
} break; } break;
default: default:
printf("[input] Clearly some sort of typo\n"); ERROR("[input] Clearly some sort of typo");
break; break;
} }
break; break;
@ -251,14 +252,14 @@ class ConcreteMachine:
time_until_interrupt_ = vdp_->get_time_until_interrupt(); time_until_interrupt_ = vdp_->get_time_until_interrupt();
break; break;
case 0xc0: case 0xc0:
printf("TODO: [output] I/O port A/N [%02x]\n", *cycle.value); LOG("TODO: [output] I/O port A/N; " << *cycle.value);
break; break;
case 0xc1: case 0xc1:
printf("TODO: [output] I/O port B/misc\n"); LOG("TODO: [output] I/O port B/misc");
break; break;
default: default:
printf("[output] Clearly some sort of typo\n"); ERROR("[output] Clearly some sort of typo");
break; break;
} }
break; break;