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Causes the 65C02 not to accept interrupts immediately after untaken branches.
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@ -533,7 +533,13 @@ if(number_of_cycles <= Cycles(0)) break;
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// MARK: - Branching
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#define BRA(condition) pc_.full++; if(condition) scheduled_program_counter_ = do_branch
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#define BRA(condition) \
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pc_.full++; \
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if(condition) { \
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scheduled_program_counter_ = do_branch; \
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} else if(is_65c02(personality)) { \
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scheduled_program_counter_ = fetch_decode_execute; \
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}
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case OperationBPL: BRA(!(negative_result_&0x80)); continue;
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case OperationBMI: BRA(negative_result_&0x80); continue;
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@ -160,8 +160,11 @@ class ProcessorStorage {
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OperationBCC, // schedules the branch program if the carry flag is clear
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OperationBCS, // schedules the branch program if the carry flag is set
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OperationBNE, // schedules the branch program if the zero flag is clear
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OperationBEQ, // schedules the branch program if the zero flag is set
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OperationBEQ, // schedules the branch program if the zero flag is set; 65C02: otherwise jumps straight into a fetch-decode-execute without considering whether to take an interrupt
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OperationBRA, // schedules the branch program
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// 65C02 modification to all branches: if the branch isn't taken, the next fetch-decode-execute
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// sequence is scheduled immediately, without any possibility of responding to an interrupt.
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// Cf. http://forum.6502.org/viewtopic.php?f=4&t=1634
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OperationBBRBBS, // inspecting the operation_, if the appropriate bit of operand_ is set or clear schedules a program to read and act upon the second operand; otherwise schedule a program to read and discard it
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