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Correct 6502 JAM behaviour.
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94058d498c
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59e1a5e5f6
@ -59,10 +59,7 @@ void Processor<personality, T, uses_ready_line>::run_for(const Cycles cycles) {
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};
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};
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const auto throwaway_read = [&](uint16_t address) {
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const auto throwaway_read = [&](uint16_t address) {
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next_bus_operation_ = BusOperation::Read;
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read_mem(bus_throwaway_, address);
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bus_address_ = address;
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bus_value_ = &bus_throwaway_;
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bus_throwaway_ = 0xff;
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};
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};
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const auto write_mem = [&](uint8_t &val, uint16_t address) {
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const auto write_mem = [&](uint8_t &val, uint16_t address) {
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@ -232,10 +229,13 @@ void Processor<personality, T, uses_ready_line>::run_for(const Cycles cycles) {
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// MARK: - JAM, WAI, STP
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// MARK: - JAM, WAI, STP
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case OperationScheduleJam: {
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case OperationSetJAMmed:
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is_jammed_ = true;
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is_jammed_ = true;
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scheduled_program_counter_ = operations_[CPU::MOS6502::JamOpcode];
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scheduled_program_counter_ -= 2;
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} continue;
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continue;
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case CycleFetchFFFE: read_mem(bus_throwaway_, 0xfffe); break;
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case CycleFetchFFFF: read_mem(bus_throwaway_, 0xffff); break;
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case OperationScheduleStop:
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case OperationScheduleStop:
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stop_is_active_ = true;
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stop_is_active_ = true;
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@ -804,6 +804,9 @@ template <Personality personality, typename T, bool uses_ready_line> void Proces
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void ProcessorBase::set_reset_line(bool active) {
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void ProcessorBase::set_reset_line(bool active) {
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interrupt_requests_ = (interrupt_requests_ & ~InterruptRequestFlags::Reset) | (active ? InterruptRequestFlags::Reset : 0);
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interrupt_requests_ = (interrupt_requests_ & ~InterruptRequestFlags::Reset) | (active ? InterruptRequestFlags::Reset : 0);
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if(is_jammed_) {
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restart_operation_fetch();
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}
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}
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}
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bool ProcessorBase::get_is_resetting() const {
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bool ProcessorBase::get_is_resetting() const {
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@ -870,6 +873,7 @@ void ProcessorBase::set_value_of(Register r, uint16_t value) {
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}
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}
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void ProcessorBase::restart_operation_fetch() {
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void ProcessorBase::restart_operation_fetch() {
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is_jammed_ = false;
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scheduled_program_counter_ = nullptr;
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scheduled_program_counter_ = nullptr;
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next_bus_operation_ = BusOperation::None;
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next_bus_operation_ = BusOperation::None;
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}
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}
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@ -73,7 +73,7 @@ using namespace CPU::MOS6502;
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#define ImpliedNop() {OperationMoveToNextProgram}
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#define ImpliedNop() {OperationMoveToNextProgram}
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#define ImmediateNop() Program(OperationIncrementPC)
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#define ImmediateNop() Program(OperationIncrementPC)
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#define JAM {CycleFetchOperand, OperationScheduleJam}
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#define JAM {CycleFetchFFFF, CycleFetchFFFE, CycleFetchFFFE, CycleFetchFFFF, OperationSetJAMmed}
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ProcessorStorage::ProcessorStorage(Personality personality) {
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ProcessorStorage::ProcessorStorage(Personality personality) {
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const InstructionList operations_6502[] = {
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const InstructionList operations_6502[] = {
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@ -198,9 +198,12 @@ class ProcessorStorage {
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OperationSetFlagsFromX, // sets the zero and negative flags based on the value of x
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OperationSetFlagsFromX, // sets the zero and negative flags based on the value of x
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OperationSetFlagsFromY, // sets the zero and negative flags based on the value of y
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OperationSetFlagsFromY, // sets the zero and negative flags based on the value of y
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OperationScheduleJam, // schedules the program for operation F2
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OperationScheduleWait, // puts the processor into WAI mode (i.e. it'll do nothing until an interrupt is received)
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OperationScheduleWait, // puts the processor into WAI mode (i.e. it'll do nothing until an interrupt is received)
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OperationScheduleStop, // puts the processor into STP mode (i.e. it'll do nothing until a reset is received)
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OperationScheduleStop, // puts the processor into STP mode (i.e. it'll do nothing until a reset is received)
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CycleFetchFFFE, // perform a throwaway read from $FFFE
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CycleFetchFFFF, // perform a throwaway read from $FFFF
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OperationSetJAMmed, // decrements the micro-operation program counter back to the operation before this one, marking the CPU as jammed
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};
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};
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using InstructionList = MicroOp[12];
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using InstructionList = MicroOp[12];
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