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Started filling an appropriate mask variable with the interrupt request status right now. Which is step one towards implementing interrupts.
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@ -182,6 +182,14 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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int number_of_cycles_;
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enum Interrupt: uint8_t {
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IRQ = 0x01,
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NMI = 0x02,
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BUSREQ = 0x04,
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};
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uint8_t request_status_;
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bool irq_line_;
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uint8_t operation_;
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RegisterPair temp16_;
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uint8_t temp8_;
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@ -1337,10 +1345,12 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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case MicroOp::EI:
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iff1_ = iff2_ = true;
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if(irq_line_) request_status_ |= Interrupt::IRQ;
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break;
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case MicroOp::DI:
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iff1_ = iff2_ = false;
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request_status_ &= ~Interrupt::IRQ;
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break;
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case MicroOp::IM:
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@ -1570,21 +1580,33 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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}
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/*!
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Sets the logical value of the interrupt line at @c time_offset cycles from now.
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Sets the logical value of the interrupt line.
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*/
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void set_interrupt_line(bool value, int time_offset) {
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void set_interrupt_line(bool value) {
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// IRQ requests are level triggered and masked.
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irq_line_ = value;
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if(irq_line_ && iff1_) {
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request_status_ |= Interrupt::IRQ;
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} else {
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request_status_ &= ~Interrupt::IRQ;
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}
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}
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/*!
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Sets the logical value of the non-maskable interrupt line at @c time_offset cycles from now.
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Sets the logical value of the non-maskable interrupt line.
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*/
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void set_non_maskable_interrupt_line(bool value, int time_offset) {
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void set_non_maskable_interrupt_line(bool value) {
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// NMIs are edge triggered and cannot be masked.
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if(value) request_status_ |= Interrupt::NMI;
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}
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/*!
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Sets the logical value of the bus request line at @c time_offset cycles from now.
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Sets the logical value of the bus request line.
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*/
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void set_bus_request_line(bool value, int time_offset) {
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void set_bus_request_line(bool value) {
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// Bus requests are level triggered and cannot be masked.
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if(value) request_status_ |= Interrupt::BUSREQ;
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else request_status_ &= ~Interrupt::BUSREQ;
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}
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/*!
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