From 5c881bd19d8a28f8d0cbfbc62be0350d59dd5892 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Mon, 6 Aug 2018 22:00:23 -0400 Subject: [PATCH] Implements PLX, PLY, PHX and PHY. --- .../6502/Implementation/6502Implementation.hpp | 6 ++++++ Processors/6502/Implementation/6502Storage.cpp | 13 +++++++++++-- Processors/6502/Implementation/6502Storage.hpp | 5 +++-- 3 files changed, 20 insertions(+), 4 deletions(-) diff --git a/Processors/6502/Implementation/6502Implementation.hpp b/Processors/6502/Implementation/6502Implementation.hpp index 7f999bde8..6761da892 100644 --- a/Processors/6502/Implementation/6502Implementation.hpp +++ b/Processors/6502/Implementation/6502Implementation.hpp @@ -115,6 +115,8 @@ if(number_of_cycles <= Cycles(0)) break; case CyclePushPCL: push(pc_.bytes.low); break; case CyclePushOperand: push(operand_); break; case CyclePushA: push(a_); break; + case CyclePushX: push(x_); break; + case CyclePushY: push(y_); break; case CycleNoWritePush: { uint16_t targetAddress = s_ | 0x100; s_--; read_mem(operand_, targetAddress); @@ -140,11 +142,15 @@ if(number_of_cycles <= Cycles(0)) break; case CyclePullPCL: s_++; read_mem(pc_.bytes.low, s_ | 0x100); break; case CyclePullPCH: s_++; read_mem(pc_.bytes.high, s_ | 0x100); break; case CyclePullA: s_++; read_mem(a_, s_ | 0x100); break; + case CyclePullX: s_++; read_mem(x_, s_ | 0x100); break; + case CyclePullY: s_++; read_mem(y_, s_ | 0x100); break; case CyclePullOperand: s_++; read_mem(operand_, s_ | 0x100); break; case OperationSetFlagsFromOperand: set_flags(operand_); continue; case OperationSetOperandFromFlagsWithBRKSet: operand_ = get_flags() | Flag::Break; continue; case OperationSetOperandFromFlags: operand_ = get_flags(); continue; case OperationSetFlagsFromA: zero_result_ = negative_result_ = a_; continue; + case OperationSetFlagsFromX: zero_result_ = negative_result_ = x_; continue; + case OperationSetFlagsFromY: zero_result_ = negative_result_ = y_; continue; case CycleIncrementPCAndReadStack: pc_.full++; throwaway_read(s_ | 0x100); break; case CycleReadPCLFromAddress: read_mem(pc_.bytes.low, address_.full); break; diff --git a/Processors/6502/Implementation/6502Storage.cpp b/Processors/6502/Implementation/6502Storage.cpp index 6dd33f569..7dd903629 100644 --- a/Processors/6502/Implementation/6502Storage.cpp +++ b/Processors/6502/Implementation/6502Storage.cpp @@ -218,8 +218,17 @@ ProcessorStorage::ProcessorStorage(Personality personality) { memcpy(operations_, operations_6502, sizeof(operations_)); // Patch the table according to the chip's personality. - switch(personality) { - default: break; + if(personality != P6502) { + // This is a 65C02 or 65SC02; add P[L/H][X/Y] + const ProcessorStorage::MicroOp phx[10] = Program(CyclePushX); + const ProcessorStorage::MicroOp phy[10] = Program(CyclePushY); + const ProcessorStorage::MicroOp plx[10] = Program(CycleReadFromS, CyclePullX, OperationSetFlagsFromX); + const ProcessorStorage::MicroOp ply[10] = Program(CycleReadFromS, CyclePullY, OperationSetFlagsFromY); + + memcpy(&operations_[0x5a], phy, sizeof(phy)); + memcpy(&operations_[0xda], phx, sizeof(phx)); + memcpy(&operations_[0x7a], ply, sizeof(ply)); + memcpy(&operations_[0xfa], plx, sizeof(plx)); } } diff --git a/Processors/6502/Implementation/6502Storage.hpp b/Processors/6502/Implementation/6502Storage.hpp index f9c47e866..a9265ef6f 100644 --- a/Processors/6502/Implementation/6502Storage.hpp +++ b/Processors/6502/Implementation/6502Storage.hpp @@ -25,13 +25,14 @@ class ProcessorStorage { enum MicroOp { CycleFetchOperation, CycleFetchOperand, OperationDecodeOperation, CycleIncPCPushPCH, CyclePushPCH, CyclePushPCL, CyclePushA, CyclePushOperand, - OperationSetI, + CyclePushX, CyclePushY, OperationSetI, OperationBRKPickVector, OperationNMIPickVector, OperationRSTPickVector, CycleReadVectorLow, CycleReadVectorHigh, CycleReadFromS, CycleReadFromPC, CyclePullOperand, CyclePullPCL, CyclePullPCH, CyclePullA, + CyclePullX, CyclePullY, CycleNoWritePush, CycleReadAndIncrementPC, CycleIncrementPCAndReadStack, CycleIncrementPCReadPCHLoadPCL, CycleReadPCHLoadPCL, CycleReadAddressHLoadAddressL, CycleReadPCLFromAddress, CycleReadPCHFromAddress, CycleLoadAddressAbsolute, @@ -58,7 +59,7 @@ class ProcessorStorage { OperationSBX, OperationLXA, OperationANE, OperationANC, OperationLAS, CycleAddSignedOperandToPC, OperationSetFlagsFromOperand, OperationSetOperandFromFlagsWithBRKSet, OperationSetOperandFromFlags, - OperationSetFlagsFromA, + OperationSetFlagsFromA, OperationSetFlagsFromX, OperationSetFlagsFromY, CycleScheduleJam };