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Extends list of BusOperations.
Now to retest, widely.
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@ -75,7 +75,7 @@ template<class T> class Cartridge:
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cycles_since_6532_update_ += Cycles(cycles_run_for / 3);
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cycles_since_6532_update_ += Cycles(cycles_run_for / 3);
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bus_extender_.advance_cycles(cycles_run_for / 3);
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bus_extender_.advance_cycles(cycles_run_for / 3);
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if(operation != CPU::MOS6502::BusOperation::Ready) {
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if(isAccessOperation(operation)) {
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// give the cartridge a chance to respond to the bus access
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// give the cartridge a chance to respond to the bus access
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bus_extender_.perform_bus_operation(operation, address, value);
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bus_extender_.perform_bus_operation(operation, address, value);
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@ -36,7 +36,7 @@ enum Register {
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X,
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X,
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Y,
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Y,
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// These exist on the 65816 only.
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// These exist on a 65816 only.
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EmulationFlag,
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EmulationFlag,
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DataBank,
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DataBank,
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ProgramBank,
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ProgramBank,
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@ -64,24 +64,53 @@ enum Flag: uint8_t {
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/*!
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/*!
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Bus handlers will be given the task of performing bus operations, allowing them to provide whatever interface they like
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Bus handlers will be given the task of performing bus operations, allowing them to provide whatever interface they like
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between a 6502 and the rest of the system. @c BusOperation lists the types of bus operation that may be requested.
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between a 6502-esque chip and the rest of the system. @c BusOperation lists the types of bus operation that may be requested.
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@c None is reserved for internal use. It will never be requested from a subclass. It is safe always to use the
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isReadOperation macro to make a binary choice between reading and writing.
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*/
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*/
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enum BusOperation {
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enum BusOperation {
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/// 6502: indicates that a read was signalled.
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/// 65816: indicates that a read was signalled with VDA.
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Read,
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Read,
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/// 6502: indicates that a read was signalled with SYNC.
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/// 65816: indicates that a read was signalled with VDA and VPA.
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ReadOpcode,
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ReadOpcode,
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/// 6502: never signalled.
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/// 65816: indicates that a read was signalled with VPA.
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ReadProgram,
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/// 6502: never signalled.
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/// 65816: indicates that a read was signalled with VPB.
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ReadVector,
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/// 6502: indicates that a write was signalled.
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/// 65816: indicates that a write was signalled with VDA.
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Write,
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Write,
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/// All processors: indicates that the processor is holding state due to the RDY input.
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/// 65C02 and 65816: indicates a WAI is ongoing.
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Ready,
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Ready,
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None
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/// 6502: never signalled.
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/// 65816: indicates that a read was signalled, but neither VDA or VPA were active.
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InternalOperation,
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/// 65C02 and 65816: indicates a STP condition.
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None,
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};
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};
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/*!
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/*!
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Evaluates to `true` if the operation is a read; `false` if it is a write or ready.
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Evaluates to @c true if the operation is any sort of read; @c false otherwise.
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*/
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*/
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#define isReadOperation(v) (v < CPU::MOS6502Esque::BusOperation::Write)
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#define isReadOperation(v) (v < CPU::MOS6502Esque::BusOperation::Write)
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/*!
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Evaluates to @c true if the operation is any sort of write; @c false otherwise.
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*/
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#define isWriteOperation(v) (v == CPU::MOS6502Esque::BusOperation::Write)
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/*!
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Evaluates to @c true if the operation is any sort of memory access; @c false otherwise.
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*/
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#define isAccessOperation(v) (v < CPU::MOS6502Esque::BusOperation::Ready)
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/*!
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/*!
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A class providing empty implementations of the methods a 6502 uses to access the bus. To wire the 6502 to a bus,
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A class providing empty implementations of the methods a 6502 uses to access the bus. To wire the 6502 to a bus,
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machines should subclass BusHandler and then declare a realisation of the 6502 template, suplying their bus
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machines should subclass BusHandler and then declare a realisation of the 6502 template, suplying their bus
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