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Extends list of BusOperations.

Now to retest, widely.
This commit is contained in:
Thomas Harte 2020-10-15 21:35:01 -04:00
parent 9c0c0255f6
commit 5dcf720bb5
2 changed files with 37 additions and 8 deletions

View File

@ -75,7 +75,7 @@ template<class T> class Cartridge:
cycles_since_6532_update_ += Cycles(cycles_run_for / 3); cycles_since_6532_update_ += Cycles(cycles_run_for / 3);
bus_extender_.advance_cycles(cycles_run_for / 3); bus_extender_.advance_cycles(cycles_run_for / 3);
if(operation != CPU::MOS6502::BusOperation::Ready) { if(isAccessOperation(operation)) {
// give the cartridge a chance to respond to the bus access // give the cartridge a chance to respond to the bus access
bus_extender_.perform_bus_operation(operation, address, value); bus_extender_.perform_bus_operation(operation, address, value);

View File

@ -36,7 +36,7 @@ enum Register {
X, X,
Y, Y,
// These exist on the 65816 only. // These exist on a 65816 only.
EmulationFlag, EmulationFlag,
DataBank, DataBank,
ProgramBank, ProgramBank,
@ -64,24 +64,53 @@ enum Flag: uint8_t {
/*! /*!
Bus handlers will be given the task of performing bus operations, allowing them to provide whatever interface they like Bus handlers will be given the task of performing bus operations, allowing them to provide whatever interface they like
between a 6502 and the rest of the system. @c BusOperation lists the types of bus operation that may be requested. between a 6502-esque chip and the rest of the system. @c BusOperation lists the types of bus operation that may be requested.
@c None is reserved for internal use. It will never be requested from a subclass. It is safe always to use the
isReadOperation macro to make a binary choice between reading and writing.
*/ */
enum BusOperation { enum BusOperation {
/// 6502: indicates that a read was signalled.
/// 65816: indicates that a read was signalled with VDA.
Read, Read,
/// 6502: indicates that a read was signalled with SYNC.
/// 65816: indicates that a read was signalled with VDA and VPA.
ReadOpcode, ReadOpcode,
/// 6502: never signalled.
/// 65816: indicates that a read was signalled with VPA.
ReadProgram,
/// 6502: never signalled.
/// 65816: indicates that a read was signalled with VPB.
ReadVector,
/// 6502: indicates that a write was signalled.
/// 65816: indicates that a write was signalled with VDA.
Write, Write,
/// All processors: indicates that the processor is holding state due to the RDY input.
/// 65C02 and 65816: indicates a WAI is ongoing.
Ready, Ready,
None
/// 6502: never signalled.
/// 65816: indicates that a read was signalled, but neither VDA or VPA were active.
InternalOperation,
/// 65C02 and 65816: indicates a STP condition.
None,
}; };
/*! /*!
Evaluates to `true` if the operation is a read; `false` if it is a write or ready. Evaluates to @c true if the operation is any sort of read; @c false otherwise.
*/ */
#define isReadOperation(v) (v < CPU::MOS6502Esque::BusOperation::Write) #define isReadOperation(v) (v < CPU::MOS6502Esque::BusOperation::Write)
/*!
Evaluates to @c true if the operation is any sort of write; @c false otherwise.
*/
#define isWriteOperation(v) (v == CPU::MOS6502Esque::BusOperation::Write)
/*!
Evaluates to @c true if the operation is any sort of memory access; @c false otherwise.
*/
#define isAccessOperation(v) (v < CPU::MOS6502Esque::BusOperation::Ready)
/*! /*!
A class providing empty implementations of the methods a 6502 uses to access the bus. To wire the 6502 to a bus, A class providing empty implementations of the methods a 6502 uses to access the bus. To wire the 6502 to a bus,
machines should subclass BusHandler and then declare a realisation of the 6502 template, suplying their bus machines should subclass BusHandler and then declare a realisation of the 6502 template, suplying their bus