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https://github.com/TomHarte/CLK.git
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Added a compact and copy stage for instruction pages, both [mostly] eliminating the mistake of letting static data structures contain pointers to instance storage and opening the door for addition of the DD and FD pages.
This commit is contained in:
Thomas Harte
parent
c70dfe1b09
commit
5dcfd85642
@ -10,6 +10,7 @@
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#define Z80_hpp
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#include <cstdint>
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#include <cstring>
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#include <cstdio>
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#include "../MicroOpScheduler.hpp"
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@ -71,14 +72,14 @@ enum BusOperation {
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};
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struct MachineCycle {
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const BusOperation operation;
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const int length;
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const uint16_t *address;
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uint8_t *const value;
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BusOperation operation;
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int length;
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uint16_t *address;
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uint8_t *value;
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};
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struct MicroOp {
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enum {
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enum Type {
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BusOperation,
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DecodeOperation,
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MoveToNextProgram,
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@ -122,7 +123,8 @@ struct MicroOp {
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SetInstructionPage,
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None
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} type;
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};
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Type type;
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void *source;
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void *destination;
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MachineCycle machine_cycle;
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@ -156,9 +158,23 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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uint8_t temp8_;
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MicroOp **current_instruction_page_;
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MicroOp *base_page_[256];
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MicroOp *ed_page_[256];
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MicroOp *fd_page_[256];
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struct InstructionPage {
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MicroOp *instructions[256];
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MicroOp *all_operations;
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InstructionPage() : all_operations(nullptr) {
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for(int c = 0; c < 256; c++) {
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instructions[c] = nullptr;
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}
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}
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~InstructionPage() {
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delete[] all_operations;
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}
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};
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InstructionPage base_page_;
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InstructionPage ed_page_;
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InstructionPage fd_page_;
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#define XX {MicroOp::None, 0}
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@ -208,15 +224,34 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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typedef MicroOp InstructionTable[256][20];
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void assemble_page(MicroOp **target, InstructionTable &table) {
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void assemble_page(InstructionPage &target, InstructionTable &table) {
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size_t number_of_micro_ops = 0;
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size_t lengths[256];
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// Count number of micro-ops required.
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for(int c = 0; c < 256; c++) {
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target[c] = table[c];
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size_t length = 0;
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while(table[c][length].type != MicroOp::MoveToNextProgram && table[c][length].type != MicroOp::None) length++;
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length++;
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lengths[c] = length;
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number_of_micro_ops += length;
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}
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// Allocate a landing area.
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target.all_operations = new MicroOp[number_of_micro_ops];
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// Copy in all programs and set pointers.
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size_t destination = 0;
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for(int c = 0; c < 256; c++) {
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memcpy(&target.all_operations[destination], table[c], lengths[c] * sizeof(MicroOp));
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target.instructions[c] = &target.all_operations[destination];
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destination += lengths[c];
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}
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}
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void assemble_ed_page(MicroOp **target) {
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void assemble_ed_page(InstructionPage &target) {
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#define NOP_ROW() XX, XX, XX, XX, XX, XX, XX, XX, XX, XX, XX, XX, XX, XX, XX, XX
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static InstructionTable ed_program_table = {
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InstructionTable ed_program_table = {
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NOP_ROW(), /* 0x00 */
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NOP_ROW(), /* 0x10 */
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NOP_ROW(), /* 0x20 */
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@ -251,7 +286,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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#undef NOP_ROW
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}
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void assemble_base_page(MicroOp **target) {
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void assemble_base_page(InstructionPage &target) {
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#define INC_DEC_LD(r) \
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Program({MicroOp::Increment8, &r}), \
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Program({MicroOp::Decrement8, &r}), \
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@ -263,7 +298,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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#define DEC_INC_DEC_LD(rf, r) \
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Program(WAIT(2), {MicroOp::Decrement16, &rf.full}), INC_DEC_LD(r)
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static InstructionTable base_program_table = {
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InstructionTable base_program_table = {
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/* 0x00 NOP */ { {MicroOp::MoveToNextProgram} }, /* 0x01 LD BC, nn */ Program(FETCH16(bc_, pc_)),
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/* 0x02 LD (BC), A */ Program(STOREL(a_, bc_)),
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@ -400,7 +435,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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/* 0xe7 RST 20h */ XX,
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/* 0xe8 RET PE */ RET(TestPE), /* 0xe9 JP (HL) */ Program({MicroOp::Move16, &hl_.full, &pc_.full}),
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/* 0xea JP PE */ JP(TestPE), /* 0xeb EX DE, HL */Program({MicroOp::ExDEHL}),
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/* 0xec CALL PE */ CALL(TestPE), /* 0xed [ED page] */Program({MicroOp::SetInstructionPage, ed_page_}),
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/* 0xec CALL PE */ CALL(TestPE), /* 0xed [ED page] */Program({MicroOp::SetInstructionPage, &ed_page_}),
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/* 0xee XOR n */ Program(FETCH(temp8_, pc_), {MicroOp::Xor, &temp8_}),
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/* 0xef RST 28h */ XX,
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/* 0xf0 RET p */ RET(TestP), /* 0xf1 POP AF */ Program(POP(temp16_), {MicroOp::DisassembleAF}),
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@ -410,7 +445,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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/* 0xf7 RST 30h */ XX,
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/* 0xf8 RET M */ RET(TestM), /* 0xf9 LD SP, HL */Program(WAIT(2), {MicroOp::Move16, &hl_.full, &sp_.full}),
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/* 0xfa JP M */ JP(TestM), /* 0xfb EI */ Program({MicroOp::EI}),
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/* 0xfc CALL M */ CALL(TestM), /* 0xfd [FD page] */Program({MicroOp::SetInstructionPage, fd_page_}),
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/* 0xfc CALL M */ CALL(TestM), /* 0xfd [FD page] */Program({MicroOp::SetInstructionPage, &fd_page_}),
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/* 0xfe CP n */ Program(FETCH(temp8_, pc_), {MicroOp::CP8, &temp8_}),
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/* 0xff RST 38h */ XX,
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};
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@ -420,8 +455,8 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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void decode_operation(uint8_t operation) {
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if(current_instruction_page_[operation]->type == MicroOp::None) {
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uint8_t page = 0x00;
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if(current_instruction_page_ == ed_page_) page = 0xed;
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if(current_instruction_page_ == fd_page_) page = 0xfd;
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if(current_instruction_page_ == ed_page_.instructions) page = 0xed;
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if(current_instruction_page_ == fd_page_.instructions) page = 0xfd;
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printf("Unknown Z80 operation %02x %02x!!!\n", page, operation);
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}
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schedule_program(current_instruction_page_[operation]);
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@ -443,6 +478,8 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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@param number_of_cycles The number of cycles to run the Z80 for.
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*/
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void run_for_cycles(int number_of_cycles) {
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// TODO: this can't legitimately be static and contain references to this via pc_ and operation_;
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// make it something else that is built at instance construction.
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static const MicroOp fetch_decode_execute[] = {
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{ MicroOp::BusOperation, nullptr, nullptr, {ReadOpcode, 4, &pc_.full, &operation_}},
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{ MicroOp::DecodeOperation },
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@ -451,7 +488,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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#define checkSchedule() \
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if(!scheduled_programs_[schedule_programs_read_pointer_]) {\
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current_instruction_page_ = base_page_;\
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current_instruction_page_ = base_page_.instructions;\
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schedule_program(fetch_decode_execute);\
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}
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@ -801,7 +838,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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case MicroOp::SetInstructionPage:
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schedule_program(fetch_decode_execute);
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current_instruction_page_ = (CPU::Z80::MicroOp **)operation->source;
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current_instruction_page_ = ((InstructionPage *)operation->source)->instructions;
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break;
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default:
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