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Add, disable some logging.
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@ -104,14 +104,16 @@ template <class BusHandlerT, Personality personality, CursorType cursor_type> cl
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void set_register(uint8_t value) {
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static constexpr bool is_ega = is_egavga(personality);
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auto load_low = [value](uint16_t &target) {
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const auto load_low = [value](uint16_t &target) {
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target = (target & 0xff00) | value;
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};
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auto load_high = [value](uint16_t &target) {
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const auto load_high = [value](uint16_t &target) {
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constexpr uint8_t mask = RefreshMask >> 8;
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target = uint16_t((target & 0x00ff) | ((value & mask) << 8));
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};
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// printf("%d/[%d/%d]: %d -> %02x\n", character_counter_, row_counter_, bus_state_.row_address, selected_register_, value);
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switch(selected_register_) {
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case 0: layout_.horizontal.total = value; break;
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case 1: layout_.horizontal.displayed = value; break;
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@ -55,6 +55,8 @@ class InterruptTimer {
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trailing edge because it is active high.
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*/
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inline void signal_hsync() {
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// printf("count h: %d/%d [%d]\n", timer_, reset_counter_, interrupt_request_);
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// Increment the timer and if it has hit 52 then reset it and
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// set the interrupt request line to true.
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++timer_;
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@ -79,11 +81,13 @@ class InterruptTimer {
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/// Indicates the leading edge of a new vertical sync.
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inline void signal_vsync() {
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// printf("count v\n");
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reset_counter_ = 2;
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}
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/// Indicates that an interrupt acknowledge has been received from the Z80.
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inline void signal_interrupt_acknowledge() {
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// printf("count IRQA\n");
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interrupt_request_ = false;
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timer_ &= ~32;
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}
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@ -93,13 +97,14 @@ class InterruptTimer {
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return last_interrupt_request_ = interrupt_request_;
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}
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/// Asks whether the interrupt status has changed.
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/// Asks whether the interrupt status has changed since the last call to @c get_request().
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inline bool request_has_changed() {
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return last_interrupt_request_ != interrupt_request_;
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}
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/// Resets the timer.
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inline void reset_count() {
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// printf("count reset\n");
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timer_ = 0;
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interrupt_request_ = false;
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}
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@ -855,14 +860,14 @@ class ConcreteMachine:
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/// The entry point for performing a partial Z80 machine cycle.
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forceinline HalfCycles perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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// Amstrad CPC timing scheme: assert WAIT for three out of four cycles
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// Amstrad CPC timing scheme: assert WAIT for three out of four cycles.
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clock_offset_ = (clock_offset_ + cycle.length) & HalfCycles(7);
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z80_.set_wait_line(clock_offset_ >= HalfCycles(2));
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// Update the CRTC once every eight half cycles; aiming for half-cycle 4 as
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// per the initial seed to the crtc_counter_, but any time in the final four
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// will do as it's safe to conclude that nobody else has touched video RAM
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// during that whole window
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// during that whole window.
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crtc_counter_ += cycle.length;
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const Cycles crtc_cycles = crtc_counter_.divide_cycles(Cycles(4));
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if(crtc_cycles > Cycles(0)) crtc_.run_for(crtc_cycles);
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@ -872,18 +877,18 @@ class ConcreteMachine:
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if(interrupt_timer_.request_has_changed()) z80_.set_interrupt_line(interrupt_timer_.get_request(), -crtc_counter_);
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// TODO (in the player, not here): adapt it to accept an input clock rate and
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// run_for as HalfCycles
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// run_for as HalfCycles.
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if(!tape_player_is_sleeping_) tape_player_.run_for(cycle.length.as_integral());
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// Pump the AY
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// Pump the AY.
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ay_.run_for(cycle.length);
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if constexpr (has_fdc) {
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// Clock the FDC, if connected, using a lazy scale by two
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// Clock the FDC, if connected, using a lazy scale by two.
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time_since_fdc_update_ += cycle.length;
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}
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// Update typing activity
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// Update typing activity.
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if(typer_) typer_->run_for(cycle.length);
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// Stop now if no action is strictly required.
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