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Implemented NEG and filled in the load/store and copy parts of the ED page that roll directly off the tongue. 53 issues outstanding.

This commit is contained in:
Thomas Harte 2017-05-28 15:47:48 -04:00
parent 6e83b7d6df
commit 68978c6e25

View File

@ -111,6 +111,7 @@ struct MicroOp {
ADD16, ADC16, SBC16,
CP8, SUB8, SBC8, ADD8, ADC8,
NEG,
ExDEHL, ExAFAFDash, EXX,
@ -345,37 +346,37 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
NOP_ROW(), /* 0x20 */
NOP_ROW(), /* 0x30 */
/* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(bc_.bytes.high),
/* 0x42 SBC HL, BC */ SBC16(hl_, bc_), /* 0x43 LD (nn), BC */ XX,
/* 0x44 NEG */ XX, /* 0x45 RETN */ XX,
/* 0x46 IM 0 */ XX, /* 0x47 LD I, A */ XX,
/* 0x42 SBC HL, BC */ SBC16(hl_, bc_), /* 0x43 LD (nn), BC */ Program(FETCH16(temp16_, pc_), STORE16L(bc_, temp16_)),
/* 0x44 NEG */ Program({MicroOp::NEG}), /* 0x45 RETN */ XX,
/* 0x46 IM 0 */ XX, /* 0x47 LD I, A */ LD(i_, a_),
/* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(bc_.bytes.low),
/* 0x4a ADC HL, BC */ ADC16(hl_, bc_), /* 0x4b LD BC, (nn) */ XX,
/* 0x4c NEG */ XX, /* 0x4d RETI */ XX,
/* 0x4e IM 0/1 */ XX, /* 0x4f LD R, A */ XX,
/* 0x4a ADC HL, BC */ ADC16(hl_, bc_), /* 0x4b LD BC, (nn) */ Program(FETCH16(temp16_, pc_), FETCH16L(bc_, temp16_)),
/* 0x4c NEG */ Program({MicroOp::NEG}), /* 0x4d RETI */ XX,
/* 0x4e IM 0/1 */ XX, /* 0x4f LD R, A */ LD(r_, a_),
/* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(de_.bytes.high),
/* 0x52 SBC HL, DE */ SBC16(hl_, de_), /* 0x53 LD (nn), DE */ XX,
/* 0x54 NEG */ XX, /* 0x55 RETN */ XX,
/* 0x56 IM 1 */ XX, /* 0x57 LD A, I */ XX,
/* 0x52 SBC HL, DE */ SBC16(hl_, de_), /* 0x53 LD (nn), DE */ Program(FETCH16(temp16_, pc_), STORE16L(de_, temp16_)),
/* 0x54 NEG */ Program({MicroOp::NEG}), /* 0x55 RETN */ XX,
/* 0x56 IM 1 */ XX, /* 0x57 LD A, I */ LD(a_, i_),
/* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(de_.bytes.low),
/* 0x5a ADC HL, DE */ ADC16(hl_, de_), /* 0x5b LD DE, (nn) */ XX,
/* 0x5c NEG */ XX, /* 0x5d RETN */ XX,
/* 0x5e IM 2 */ XX, /* 0x5f LD A, R */ XX,
/* 0x5a ADC HL, DE */ ADC16(hl_, de_), /* 0x5b LD DE, (nn) */ Program(FETCH16(temp16_, pc_), FETCH16L(bc_, temp16_)),
/* 0x5c NEG */ Program({MicroOp::NEG}), /* 0x5d RETN */ XX,
/* 0x5e IM 2 */ XX, /* 0x5f LD A, R */ LD(a_, r_),
/* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(hl_.bytes.high),
/* 0x62 SBC HL, HL */ SBC16(hl_, hl_), /* 0x63 LD (nn), HL */ XX,
/* 0x64 NEG */ XX, /* 0x65 RETN */ XX,
/* 0x62 SBC HL, HL */ SBC16(hl_, hl_), /* 0x63 LD (nn), HL */ Program(FETCH16(temp16_, pc_), STORE16L(hl_, temp16_)),
/* 0x64 NEG */ Program({MicroOp::NEG}), /* 0x65 RETN */ XX,
/* 0x66 IM 0 */ XX, /* 0x67 RRD */ XX,
/* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(hl_.bytes.low),
/* 0x6a ADC HL, HL */ ADC16(hl_, hl_), /* 0x6b LD HL, (nn) */ XX,
/* 0x6c NEG */ XX, /* 0x6d RETN */ XX,
/* 0x6a ADC HL, HL */ ADC16(hl_, hl_), /* 0x6b LD HL, (nn) */ Program(FETCH16(temp16_, pc_), FETCH16L(hl_, temp16_)),
/* 0x6c NEG */ Program({MicroOp::NEG}), /* 0x6d RETN */ XX,
/* 0x6e IM 0/1 */ XX, /* 0x6f RLD */ XX,
/* 0x70 IN (C) */ IN_C(temp8_),
/* 0x71 OUT (C), 0 */ Program({MicroOp::SetZero}, OUT(bc_, temp8_)),
/* 0x72 SBC HL, SP */ SBC16(hl_, sp_), /* 0x73 LD (nn), SP */ Program(FETCH16(temp16_, pc_), STORE16L(sp_, temp16_)),
/* 0x74 NEG */ XX, /* 0x75 RETN */ XX,
/* 0x74 NEG */ Program({MicroOp::NEG}), /* 0x75 RETN */ XX,
/* 0x76 IM 1 */ XX, /* 0x77 XX */ XX,
/* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(a_),
/* 0x7a ADC HL, SP */ ADC16(hl_, sp_), /* 0x7b LD SP, (nn) */ Program(FETCH16(temp16_, pc_), FETCH16L(sp_, temp16_)),
/* 0x7c NEG */ XX, /* 0x7d RETN */ XX,
/* 0x7c NEG */ Program({MicroOp::NEG}), /* 0x7d RETN */ XX,
/* 0x7e IM 2 */ XX, /* 0x7f XX */ XX,
NOP_ROW(), /* 0x80 */
NOP_ROW(), /* 0x90 */
@ -859,6 +860,19 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
subtract_flag_ = 0;
} break;
case MicroOp::NEG: {
int overflow = (a_ == 0x80);
int result = -a_;
int halfResult = -(a_&0xf);
a_ = (uint8_t)result;
bit5_result_ = bit3_result_ = sign_result_ = zero_result_ = a_;
parity_overflow_flag_ = overflow ? Flag::Overflow : 0;
subtract_flag_ = Flag::Subtract;
carry_flag_ = (result >> 8) & Flag::Carry;
half_carry_flag_ = halfResult & Flag::HalfCarry;
} break;
case MicroOp::Increment8: {
uint8_t value = *(uint8_t *)operation->source;
int result = value + 1;