1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-23 03:32:32 +00:00

Completed ED page conversion. Rolling onwards...

This commit is contained in:
Thomas Harte 2017-06-18 17:56:48 -04:00
parent 0d39672d32
commit 69ebbe019a

View File

@ -462,25 +462,25 @@ template <class T> class Processor {
/* 0x7e IM 2 */ StdInstr({MicroOp::IM}), /* 0x7f XX */ NOP, /* 0x7e IM 2 */ StdInstr({MicroOp::IM}), /* 0x7f XX */ NOP,
NOP_ROW(), /* 0x80 */ NOP_ROW(), /* 0x80 */
NOP_ROW(), /* 0x90 */ NOP_ROW(), /* 0x90 */
/* 0xa0 LDI */ Program(FETCHL(temp8_, hl_), STOREL(temp8_, de_), WAIT(2), {MicroOp::LDI}), /* 0xa0 LDI */ StdInstr(Read3(hl_, temp8_), Write5(de_, temp8_), {MicroOp::LDI}),
/* 0xa1 CPI */ Program(FETCHL(temp8_, hl_), WAIT(5), {MicroOp::CPI}), /* 0xa1 CPI */ StdInstr(Read3(hl_, temp8_), InternalOperation(5), {MicroOp::CPI}),
/* 0xa2 INI */ Program(WAIT(1), IN(bc_, temp8_), STOREL(temp8_, hl_), {MicroOp::INI}), /* 0xa2 INI */ Instr(3, Input(bc_, temp8_), Write3(hl_, temp8_), {MicroOp::INI}),
/* 0xa3 OTI */ Program(WAIT(1), FETCHL(temp8_, hl_), {MicroOp::OUTI}, OUT(bc_, temp8_)), /* 0xa3 OTI */ Instr(3, Read3(hl_, temp8_), {MicroOp::OUTI}, Output(bc_, temp8_)),
NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP,
/* 0xa8 LDD */ Program(FETCHL(temp8_, hl_), STOREL(temp8_, de_), WAIT(2), {MicroOp::LDD}), /* 0xa8 LDD */ StdInstr(Read3(hl_, temp8_), Write5(de_, temp8_), {MicroOp::LDD}),
/* 0xa9 CPD */ Program(FETCHL(temp8_, hl_), WAIT(5), {MicroOp::CPD}), /* 0xa9 CPD */ StdInstr(Read3(hl_, temp8_), InternalOperation(5), {MicroOp::CPD}),
/* 0xaa IND */ Program(WAIT(1), IN(bc_, temp8_), STOREL(temp8_, hl_), {MicroOp::IND}), /* 0xaa IND */ Instr(3, Input(bc_, temp8_), Write3(hl_, temp8_), {MicroOp::IND}),
/* 0xab OTD */ Program(WAIT(1), FETCHL(temp8_, hl_), {MicroOp::OUTD}, OUT(bc_, temp8_)), /* 0xab OTD */ Instr(3, Read3(hl_, temp8_), {MicroOp::OUTD}, Output(bc_, temp8_)),
NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP,
/* 0xb0 LDIR */ Program(FETCHL(temp8_, hl_), STOREL(temp8_, de_), WAIT(2), {MicroOp::LDIR}, WAIT(5)), /* 0xb0 LDIR */ StdInstr(Read3(hl_, temp8_), Write5(de_, temp8_), {MicroOp::LDIR}, InternalOperation(5)),
/* 0xb1 CPIR */ Program(FETCHL(temp8_, hl_), WAIT(5), {MicroOp::CPIR}, WAIT(5)), /* 0xb1 CPIR */ StdInstr(Read3(hl_, temp8_), InternalOperation(5), {MicroOp::CPIR}, InternalOperation(5)),
/* 0xb2 INIR */ Program(WAIT(1), IN(bc_, temp8_), STOREL(temp8_, hl_), {MicroOp::INIR}, WAIT(5)), /* 0xb2 INIR */ Instr(3, Input(bc_, temp8_), Write3(hl_, temp8_), {MicroOp::INIR}, InternalOperation(5)),
/* 0xb3 OTIR */ Program(WAIT(1), FETCHL(temp8_, hl_), {MicroOp::OUTI}, OUT(bc_, temp8_), {MicroOp::OUT_R}, WAIT(5)), /* 0xb3 OTIR */ Instr(3, Read(hl_, temp8_), {MicroOp::OUTI}, Output(bc_, temp8_), {MicroOp::OUT_R}, InternalOperation(5)),
NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP,
/* 0xb8 LDDR */ Program(FETCHL(temp8_, hl_), STOREL(temp8_, de_), WAIT(2), {MicroOp::LDDR}, WAIT(5)), /* 0xb8 LDDR */ StdInstr(Read3(hl_, temp8_), Write5(de_, temp8_), {MicroOp::LDDR}, InternalOperation(5)),
/* 0xb9 CPDR */ Program(FETCHL(temp8_, hl_), WAIT(5), {MicroOp::CPDR}, WAIT(5)), /* 0xb9 CPDR */ StdInstr(Read3(hl_, temp8_), InternalOperation(5), {MicroOp::CPDR}, InternalOperation(5)),
/* 0xba INDR */ Program(WAIT(1), IN(bc_, temp8_), STOREL(temp8_, hl_), {MicroOp::INDR}, WAIT(5)), /* 0xba INDR */ Instr(3, Input(bc_, temp8_), Write3(hl_, temp8_), {MicroOp::INDR}, InternalOperation(5)),
/* 0xbb OTDR */ Program(WAIT(1), FETCHL(temp8_, hl_), {MicroOp::OUTD}, OUT(bc_, temp8_), {MicroOp::OUT_R}, WAIT(5)), /* 0xbb OTDR */ Instr(3, Read3(hl_, temp8_), {MicroOp::OUTD}, OUT(bc_, temp8_), {MicroOp::OUT_R}, InternalOperation(5)),
NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP,
NOP_ROW(), /* 0xc0 */ NOP_ROW(), /* 0xc0 */
NOP_ROW(), /* 0xd0 */ NOP_ROW(), /* 0xd0 */