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Copies in a few more hardware notes.
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@ -216,8 +216,52 @@ void z8530::Channel::write(bool data, uint8_t pointer, uint8_t value) {
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case 0x1: // Write register 1 — Transmit/Receive Interrupt and Data Transfer Mode Definition.
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interrupt_mask_ = value;
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/*
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b7 = 0 => Wait/Request output is inactive; 1 => output is informative.
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b6 = Wait/request output is for...
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0 => wait: floating when inactive, low if CPU is attempting to transfer data the SCC isn't yet ready for.
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1 => request: high if inactive, low if SCC is ready to transfer data.
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b5 = 1 => wait/request is relative to read buffer; 0 => relative to write buffer.
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b4/b3:
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00 = disable receive interrupt
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01 = interrupt on first character or special condition
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10 = interrupt on all characters and special conditions
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11 = interrupt only upon special conditions.
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b2 = 1 => parity error is a special condition; 0 => it isn't.
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b1 = 1 => transmit buffer empty interrupt is enabled; 0 => it isn't.
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b0 = 1 => external interrupt is enabled; 0 => it isn't.
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*/
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LOG("[SCC] Interrupt mask: " << PADHEX(2) << int(value));
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break;
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case 0x3: { // Write register 3 — Receive Parameters and Control.
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// Get bit count.
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int receive_bit_count = 8;
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switch(value >> 6) {
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default: receive_bit_count = 5; break;
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case 1: receive_bit_count = 7; break;
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case 2: receive_bit_count = 6; break;
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case 3: receive_bit_count = 8; break;
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}
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LOG("[SCC] Receive bit count: " << receive_bit_count);
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/*
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b7,b6:
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00 = 5 receive bits per character
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01 = 7 bits
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10 = 6 bits
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11 = 8 bits
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b5 = 1 => DCD and CTS outputs are set automatically; 0 => they're inputs to read register 0.
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(DCD is ignored in local loopback; CTS is ignored in both auto echo and local loopback).
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b4: enter hunt mode (if set to 1, presumably?)
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b3 = 1 => enable receiver CRC generation; 0 => don't.
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*/
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} break;
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case 0x4: // Write register 4 — Transmit/Receive Miscellaneous Parameters and Modes.
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// Bits 0 and 1 select parity mode.
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if(!(value&1)) {
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