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Adjust my expectation as to length.

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This commit is contained in:
Thomas Harte 2022-06-02 12:11:54 -04:00
parent 2bd20446bb
commit 6dd89eb0d7
1 changed files with 10 additions and 1 deletions
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11
OSBindings/Mac/Clock SignalTests/68000ArithmeticTests.mm
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@ -870,7 +870,16 @@
XCTAssertEqual(state.registers.data[1], 0x1fffffff);
XCTAssertEqual(state.registers.supervisor_stack_pointer, initial_sp - 6);
XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend);
XCTAssertEqual(44, self.machine->get_cycle_count());
// Total expected bus pattern:
//
// np | nn nn | nw nw nw np np np n np = 42 cycles
//
// Noted: Yacht shows a total of three nps for a DIVS #;
// I believe this is incorrect as it includes two in the
// '1st op (ea)' stage, but an immediate word causes
// only one elsewhere.
XCTAssertEqual(42, self.machine->get_cycle_count());
// Check stack contents; should be PC.l, PC.h and status register.
// Assumed: the program counter on the stack is that of the