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Come to conclusion on R15; fix link values.

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This commit is contained in:
Thomas Harte 2024-03-12 10:42:09 -04:00
parent e9c5582fe1
commit 6efc41ded7
3 changed files with 24 additions and 22 deletions
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10
InstructionSets/ARM/Executor.hpp
View File

@ -182,9 +182,11 @@ struct Executor {
registers_.set_pc(pc_proxy); registers_.set_pc(pc_proxy);
} }
if constexpr (flags.set_condition_codes()) { if constexpr (flags.set_condition_codes()) {
// TODO: different sources have me going back and forth on the second // "When Rd is R15 and the S flag in the instruction is set, the PSR is overwritten by the
// part of the conditional here. // corresponding bits in the ALU result... [even] if the instruction is of a type that does not
if(fields.destination() == 15 && is_comparison(flags.operation())) { // normally produce a result (CMP, CMN, TST, TEQ) ... the result will be used to update those
// PSR flags which are not protected by virtue of the processor mode"
if(fields.destination() == 15) {
registers_.set_status(conditions); registers_.set_status(conditions);
} else { } else {
// Set N and Z in a unified way. // Set N and Z in a unified way.
@ -229,7 +231,7 @@ struct Executor {
constexpr BranchFlags flags(f); constexpr BranchFlags flags(f);
if constexpr (flags.operation() == BranchFlags::Operation::BL) { if constexpr (flags.operation() == BranchFlags::Operation::BL) {
registers_[14] = registers_.pc(0); registers_[14] = registers_.pc_status(0);
} }
registers_.set_pc(registers_.pc(4) + branch.offset()); registers_.set_pc(registers_.pc(4) + branch.offset());
} }

6
InstructionSets/ARM/Registers.hpp
View File

@ -155,15 +155,15 @@ struct Registers {
switch(type) { switch(type) {
case Exception::IRQ: case Exception::IRQ:
set_mode(Mode::IRQ); set_mode(Mode::IRQ);
active_[14] = pc(8); active_[14] = pc_status(8);
break; break;
case Exception::FIQ: case Exception::FIQ:
set_mode(Mode::FIQ); set_mode(Mode::FIQ);
active_[14] = pc(8); active_[14] = pc_status(8);
break; break;
default: default:
set_mode(Mode::Supervisor); set_mode(Mode::Supervisor);
active_[14] = pc(4); active_[14] = pc_status(4);
break; break;
} }

30
Machines/Acorn/Archimedes/Archimedes.cpp
View File

@ -750,26 +750,26 @@ class ConcreteMachine:
all.insert(instruction); all.insert(instruction);
if(executor_.pc() == 0x03801a14) { if(executor_.pc() == 0x03802b40) {
printf(""); printf("");
} }
// log |= (executor_.pc() > 0x02000000 && executor_.pc() < 0x02000078); // log |= (executor_.pc() > 0x02000000 && executor_.pc() < 0x02000078);
log |= executor_.pc() == 0x03801980; // log |= executor_.pc() == 0x03801980;
// log |= (executor_.pc() > 0x03801000); // log |= (executor_.pc() > 0x03801000);
log &= executor_.pc() != 0x03801a0c; // log &= executor_.pc() != 0x03801a0c;
if(executor_.pc() == 0x02000078) { // if(executor_.pc() == 0x02000078) {
if(!all.empty()) { // if(!all.empty()) {
int c = 0; // int c = 0;
for(auto instr: all) { // for(auto instr: all) {
printf("0x%08x, ", instr); // printf("0x%08x, ", instr);
++c; // ++c;
if(!(c&31)) printf("\n"); // if(!(c&31)) printf("\n");
} // }
all.clear(); // all.clear();
} // }
return; // return;
} // }
if(log) { if(log) {
auto info = logger.info(); auto info = logger.info();