From 79c2bc1fd7e45857e2da99c64cca0391cd3fe367 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Mon, 19 Apr 2021 18:43:50 -0400 Subject: [PATCH 1/2] Put the program counter on the bus during interrupt acknowledge. --- Processors/Z80/Implementation/Z80Storage.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Processors/Z80/Implementation/Z80Storage.cpp b/Processors/Z80/Implementation/Z80Storage.cpp index 8f2404ed8..61483e8ff 100644 --- a/Processors/Z80/Implementation/Z80Storage.cpp +++ b/Processors/Z80/Implementation/Z80Storage.cpp @@ -38,9 +38,9 @@ ProcessorStorage::ProcessorStorage() { #define OutputWait(addr, val, f) PartialMachineCycle(PartialMachineCycle::OutputWait, HalfCycles(2), &addr.full, &val, f) #define OutputEnd(addr, val) PartialMachineCycle(PartialMachineCycle::Output, HalfCycles(3), &addr.full, &val, false) -#define IntAckStart(length, val) PartialMachineCycle(PartialMachineCycle::InterruptStart, HalfCycles(length), nullptr, &val, false) -#define IntWait(val) PartialMachineCycle(PartialMachineCycle::InterruptWait, HalfCycles(2), nullptr, &val, true) -#define IntAckEnd(val) PartialMachineCycle(PartialMachineCycle::Interrupt, HalfCycles(3), nullptr, &val, false) +#define IntAckStart(length, val) PartialMachineCycle(PartialMachineCycle::InterruptStart, HalfCycles(length), &pc_.full, &val, false) +#define IntWait(val) PartialMachineCycle(PartialMachineCycle::InterruptWait, HalfCycles(2), &pc_.full, &val, true) +#define IntAckEnd(val) PartialMachineCycle(PartialMachineCycle::Interrupt, HalfCycles(3), &pc_.full, &val, false) // A wrapper to express a bus operation as a micro-op From 77fcf52d27a60f12427bf40bf775f75ea58e5170 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Mon, 19 Apr 2021 18:53:00 -0400 Subject: [PATCH 2/2] Purely style: remove some redundant `nullptr`s. --- Processors/Z80/Implementation/Z80Storage.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Processors/Z80/Implementation/Z80Storage.cpp b/Processors/Z80/Implementation/Z80Storage.cpp index 61483e8ff..a415707ca 100644 --- a/Processors/Z80/Implementation/Z80Storage.cpp +++ b/Processors/Z80/Implementation/Z80Storage.cpp @@ -83,10 +83,10 @@ ProcessorStorage::ProcessorStorage() { /* The following are actual instructions */ #define NOP { {MicroOp::MoveToNextProgram} } -#define JP(cc) Sequence(Read16Inc(pc_, memptr_), {MicroOp::cc, nullptr}, {MicroOp::Move16, &memptr_.full, &pc_.full}) +#define JP(cc) Sequence(Read16Inc(pc_, memptr_), {MicroOp::cc}, {MicroOp::Move16, &memptr_.full, &pc_.full}) #define CALL(cc) Sequence(ReadInc(pc_, memptr_.halves.low), {MicroOp::cc, conditional_call_untaken_program_.data()}, ReadInc(pc_, memptr_.halves.high), InternalOperation(2), Push(pc_), {MicroOp::Move16, &memptr_.full, &pc_.full}) -#define RET(cc) Sequence(InternalOperation(2), {MicroOp::cc, nullptr}, Pop(memptr_), {MicroOp::Move16, &memptr_.full, &pc_.full}) -#define JR(cc) Sequence(ReadInc(pc_, temp8_), {MicroOp::cc, nullptr}, InternalOperation(10), {MicroOp::CalculateIndexAddress, &pc_.full}, {MicroOp::Move16, &memptr_.full, &pc_.full}) +#define RET(cc) Sequence(InternalOperation(2), {MicroOp::cc}, Pop(memptr_), {MicroOp::Move16, &memptr_.full, &pc_.full}) +#define JR(cc) Sequence(ReadInc(pc_, temp8_), {MicroOp::cc}, InternalOperation(10), {MicroOp::CalculateIndexAddress, &pc_.full}, {MicroOp::Move16, &memptr_.full, &pc_.full}) #define RST() Sequence(InternalOperation(2), {MicroOp::CalculateRSTDestination}, Push(pc_), {MicroOp::Move16, &memptr_.full, &pc_.full}) #define LD(a, b) Sequence({MicroOp::Move8, &b, &a}) @@ -180,7 +180,7 @@ void ProcessorStorage::install_default_instruction_set() { BusOp(Refresh()), InternalOperation(2), Push(pc_), - { MicroOp::JumpTo66, nullptr, nullptr}, + { MicroOp::JumpTo66 }, { MicroOp::MoveToNextProgram } }; MicroOp irq_mode0_program[] = {