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Implements the single-byte branches.

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Thomas Harte
2020-10-06 21:24:43 -04:00
parent ebff83018e
commit 7065ba4857
3 changed files with 42 additions and 3 deletions
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40
Processors/65816/Implementation/65816Implementation.hpp
View File

@@ -187,6 +187,15 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
} }
continue; continue;
case OperationCopyPBRToData:
data_buffer_.size = 1;
data_buffer_.value = program_bank_ >> 16;
continue;
case OperationCopyDataToPC:
pc_ = uint16_t(data_buffer_.value);
continue;
// //
// Address construction. // Address construction.
// //
@@ -463,6 +472,33 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
flags_.set_nz(a_top()); flags_.set_nz(a_top());
break; break;
//
// Branches.
//
#define BRA(condition) \
if(!(condition)) { \
next_op_ += 3; \
} else { \
data_buffer_.size = 2; \
data_buffer_.value = pc_ + int8_t(data_buffer_.value); \
\
if((pc_ & 0xff00) == (data_buffer_.value & 0xff00)) { \
++next_op_; \
} \
}
case BPL: BRA(!(flags_.negative_result&0x80)); break;
case BMI: BRA(flags_.negative_result&0x80); break;
case BVC: BRA(!flags_.overflow); break;
case BVS: BRA(flags_.overflow); break;
case BCC: BRA(!flags_.carry); break;
case BCS: BRA(flags_.carry); break;
case BNE: BRA(flags_.zero_result); break;
case BEQ: BRA(!flags_.zero_result); break;
case BRA: BRA(true); break;
#undef BRA
// TODO: // TODO:
// ADC, BIT, CMP, CPX, CPY, SBC, // ADC, BIT, CMP, CPX, CPY, SBC,
@@ -470,7 +506,7 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
// PHB, PHP, PHD, PHK, // PHB, PHP, PHD, PHK,
// ASL, LSR, ROL, ROR, TRB, TSB, // ASL, LSR, ROL, ROR, TRB, TSB,
// REP, SEP, // REP, SEP,
// BCC, BCS, BEQ, BMI, BNE, BPL, BRA, BVC, BVS, BRL, // BRL,
// TAX, TAY, TCD, TCS, TDC, TSC, TSX, TXA, TXS, TXY, TYA, TYX, // TAX, TAY, TCD, TCS, TDC, TSC, TSX, TXA, TXS, TXY, TYA, TYX,
// XCE, XBA, // XCE, XBA,
// STP, WAI, // STP, WAI,
@@ -482,7 +518,7 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
} }
continue; continue;
// TODO: OperationCopyPBRToData, OperationPrepareException // TODO: OperationPrepareException
default: default:
assert(false); assert(false);

4
Processors/65816/Implementation/65816Storage.cpp
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@@ -549,12 +549,14 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
static void relative(AccessType, bool, const std::function<void(MicroOp)> &target) { static void relative(AccessType, bool, const std::function<void(MicroOp)> &target) {
target(CycleFetchIncrementPC); // Offset target(CycleFetchIncrementPC); // Offset
target(OperationPerform); // The branch instructions will all skip one or two target(OperationPerform); // The branch instructions will all skip one or three
// of the next cycles, depending on the effect of // of the next cycles, depending on the effect of
// the jump. // the jump.
target(CycleFetchPC); // IO target(CycleFetchPC); // IO
target(CycleFetchPC); // IO target(CycleFetchPC); // IO
target(OperationCopyDataToPC); // Install the address that was calculated above.
} }
// 21. Relative long; rl. // 21. Relative long; rl.

1
Processors/65816/Implementation/65816Storage.hpp
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@@ -111,6 +111,7 @@ enum MicroOp: uint8_t {
/// Copies the current program counter to the data buffer. /// Copies the current program counter to the data buffer.
OperationCopyPCToData, OperationCopyPCToData,
OperationCopyInstructionToData, OperationCopyInstructionToData,
OperationCopyDataToPC,
/// Copies the current PBR to the data buffer. /// Copies the current PBR to the data buffer.
OperationCopyPBRToData, OperationCopyPBRToData,