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https://github.com/TomHarte/CLK.git
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Corrects read/write access to auxiliary soft switches.
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ddd84db510
commit
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@ -598,13 +598,13 @@ template <Analyser::Static::AppleII::Target::Model model> class ConcreteMachine:
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case 0xc054:
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case 0xc054:
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case 0xc055:
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case 0xc055:
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update_video();
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update_video();
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video_.set_page2(!!(address&1));
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video_.set_page2(address&1);
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auxiliary_switches_.access(address, isReadOperation(operation));
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auxiliary_switches_.access(address, isReadOperation(operation));
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break;
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break;
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case 0xc056:
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case 0xc056:
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case 0xc057:
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case 0xc057:
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update_video();
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update_video();
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video_.set_high_resolution(!!(address&1));
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video_.set_high_resolution(address&1);
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auxiliary_switches_.access(address, isReadOperation(operation));
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auxiliary_switches_.access(address, isReadOperation(operation));
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break;
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break;
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@ -104,41 +104,51 @@ template <typename Machine> class AuxiliaryMemorySwitches {
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return;
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return;
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}
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}
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if(is_read) return;
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if(address < 0xc000 || address >= 0xc058) return;
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switch(address) {
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switch(address) {
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default: break;
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default: break;
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case 0xc000: case 0xc001:
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case 0xc000: case 0xc001:
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if(!is_read) {
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switches_.store_80 = address & 1;
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switches_.store_80 = address & 1;
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set_main_paging();
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set_main_paging();
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}
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break;
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break;
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case 0xc002: case 0xc003:
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case 0xc002: case 0xc003:
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if(!is_read) {
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switches_.read_auxiliary_memory = address & 1;
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switches_.read_auxiliary_memory = address & 1;
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set_main_paging();
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set_main_paging();
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}
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break;
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break;
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case 0xc004: case 0xc005:
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case 0xc004: case 0xc005:
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if(!is_read) {
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switches_.write_auxiliary_memory = address & 1;
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switches_.write_auxiliary_memory = address & 1;
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set_main_paging();
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set_main_paging();
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}
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break;
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break;
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case 0xc006: case 0xc007:
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case 0xc006: case 0xc007:
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if(!is_read) {
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switches_.internal_CX_rom = address & 1;
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switches_.internal_CX_rom = address & 1;
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set_card_paging();
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set_card_paging();
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}
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break;
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break;
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case 0xc008: case 0xc009:
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case 0xc008: case 0xc009:
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if(switches_.alternative_zero_page != bool(address & 1)) {
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if(!is_read && switches_.alternative_zero_page != bool(address & 1)) {
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switches_.alternative_zero_page = address & 1;
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switches_.alternative_zero_page = address & 1;
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set_zero_page_paging();
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set_zero_page_paging();
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}
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}
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break;
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break;
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case 0xc00a: case 0xc00b:
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case 0xc00a: case 0xc00b:
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if(!is_read) {
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switches_.slot_C3_rom = address & 1;
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switches_.slot_C3_rom = address & 1;
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set_card_paging();
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set_card_paging();
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}
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break;
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break;
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case 0xc054: case 0xc055:
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case 0xc054: case 0xc055:
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