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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-29 12:50:28 +00:00

Corrects read/write access to auxiliary soft switches.

This commit is contained in:
Thomas Harte 2020-10-24 19:00:03 -04:00
parent ddd84db510
commit 726b5f62bb
2 changed files with 24 additions and 14 deletions

View File

@ -598,13 +598,13 @@ template <Analyser::Static::AppleII::Target::Model model> class ConcreteMachine:
case 0xc054: case 0xc054:
case 0xc055: case 0xc055:
update_video(); update_video();
video_.set_page2(!!(address&1)); video_.set_page2(address&1);
auxiliary_switches_.access(address, isReadOperation(operation)); auxiliary_switches_.access(address, isReadOperation(operation));
break; break;
case 0xc056: case 0xc056:
case 0xc057: case 0xc057:
update_video(); update_video();
video_.set_high_resolution(!!(address&1)); video_.set_high_resolution(address&1);
auxiliary_switches_.access(address, isReadOperation(operation)); auxiliary_switches_.access(address, isReadOperation(operation));
break; break;

View File

@ -104,41 +104,51 @@ template <typename Machine> class AuxiliaryMemorySwitches {
return; return;
} }
if(is_read) return; if(address < 0xc000 || address >= 0xc058) return;
switch(address) { switch(address) {
default: break; default: break;
case 0xc000: case 0xc001: case 0xc000: case 0xc001:
if(!is_read) {
switches_.store_80 = address & 1; switches_.store_80 = address & 1;
set_main_paging(); set_main_paging();
}
break; break;
case 0xc002: case 0xc003: case 0xc002: case 0xc003:
if(!is_read) {
switches_.read_auxiliary_memory = address & 1; switches_.read_auxiliary_memory = address & 1;
set_main_paging(); set_main_paging();
}
break; break;
case 0xc004: case 0xc005: case 0xc004: case 0xc005:
if(!is_read) {
switches_.write_auxiliary_memory = address & 1; switches_.write_auxiliary_memory = address & 1;
set_main_paging(); set_main_paging();
}
break; break;
case 0xc006: case 0xc007: case 0xc006: case 0xc007:
if(!is_read) {
switches_.internal_CX_rom = address & 1; switches_.internal_CX_rom = address & 1;
set_card_paging(); set_card_paging();
}
break; break;
case 0xc008: case 0xc009: case 0xc008: case 0xc009:
if(switches_.alternative_zero_page != bool(address & 1)) { if(!is_read && switches_.alternative_zero_page != bool(address & 1)) {
switches_.alternative_zero_page = address & 1; switches_.alternative_zero_page = address & 1;
set_zero_page_paging(); set_zero_page_paging();
} }
break; break;
case 0xc00a: case 0xc00b: case 0xc00a: case 0xc00b:
if(!is_read) {
switches_.slot_C3_rom = address & 1; switches_.slot_C3_rom = address & 1;
set_card_paging(); set_card_paging();
}
break; break;
case 0xc054: case 0xc055: case 0xc054: case 0xc055: