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https://github.com/TomHarte/CLK.git
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Does a better job of shifting output; takes a new guess at the no-receiver case.
ROM03 at least now reaches "check startup device!"
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@ -279,7 +279,6 @@ void IWM::run_for(const Cycles cycles) {
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--output_bits_remaining_;
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if(!output_bits_remaining_) {
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if(!(write_handshake_ & 0x80)) {
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write_handshake_ |= 0x80;
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shift_register_ = next_output_;
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output_bits_remaining_ = 8;
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// LOG("Next byte: " << PADHEX(2) << int(shift_register_));
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@ -287,12 +286,20 @@ void IWM::run_for(const Cycles cycles) {
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write_handshake_ &= ~0x40;
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if(drives_[active_drive_]) drives_[active_drive_]->end_writing();
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LOG("Overrun; done.");
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select_shift_mode();
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output_bits_remaining_ = 1;
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}
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// Either way, the IWM is ready for more data.
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write_handshake_ |= 0x80;
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}
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}
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cycles_since_shift_ = integer_cycles;
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// Either some bits were output, in which case cycles_since_shift_ is no 0 and
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// integer_cycles is some number less than bit_length_, or none were and
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// cycles_since_shift_ + integer_cycles is less than bit_length, and the new
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// part should be accumulated.
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cycles_since_shift_ += integer_cycles;
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if(drives_[active_drive_] && integer_cycles) {
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drives_[active_drive_]->run_for(cycles_since_shift_);
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}
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@ -329,8 +336,8 @@ void IWM::select_shift_mode() {
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}
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// If writing mode just began, set the drive into write mode and cue up the first output byte.
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if(drives_[active_drive_] && old_shift_mode != ShiftMode::Writing && shift_mode_ == ShiftMode::Writing) {
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drives_[active_drive_]->begin_writing(Storage::Time(1, clock_rate_ / bit_length_.as_integral()), false);
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if(old_shift_mode != ShiftMode::Writing && shift_mode_ == ShiftMode::Writing) {
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if(drives_[active_drive_]) drives_[active_drive_]->begin_writing(Storage::Time(1, clock_rate_ / bit_length_.as_integral()), false);
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shift_register_ = next_output_;
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write_handshake_ |= 0x80 | 0x40;
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output_bits_remaining_ = 8;
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