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mirror of https://github.com/TomHarte/CLK.git synced 2024-12-24 12:30:17 +00:00

Attempts to route CIA interrupts.

This commit is contained in:
Thomas Harte 2021-07-28 19:36:30 -04:00
parent 37a55c3a77
commit 759007ffc1
5 changed files with 27 additions and 6 deletions

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@ -57,6 +57,9 @@ template <typename PortHandlerT, Personality personality> class MOS6526:
/// Pulses the TOD input the specified number of times.
void advance_tod(int count);
/// @returns @c true if the interrupt output is active, @c false otherwise.
bool get_interrupt_line();
private:
PortHandlerT &port_handler_;

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@ -37,12 +37,14 @@ template <typename BusHandlerT, Personality personality>
void MOS6526<BusHandlerT, personality>::update_interrupts() {
if(interrupt_state_ & interrupt_control_) {
interrupt_state_ |= 0x80;
printf("6526 should signal interrupt\n");
assert(false);
}
}
template <typename BusHandlerT, Personality personality>
bool MOS6526<BusHandlerT, personality>::get_interrupt_line() {
return interrupt_state_ & 0x80;
}
template <typename BusHandlerT, Personality personality>
void MOS6526<BusHandlerT, personality>::write(int address, uint8_t value) {
address &= 0xf;

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@ -82,7 +82,9 @@ class ConcreteMachine:
const auto changes = chipset_.run_for(cycle.length);
cia_a_.advance_tod(changes.vsyncs);
cia_b_.advance_tod(changes.hsyncs);
mc68000_.set_interrupt_level(changes.interrupt_level);
chipset_.set_cia_interrupts(cia_a_.get_interrupt_line(), cia_b_.get_interrupt_line());
mc68000_.set_interrupt_level(chipset_.get_interrupt_level());
// Check for assertion of reset.
if(cycle.operation & Microcycle::Reset) {

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@ -22,7 +22,7 @@ enum InterruptFlag: uint16_t {
SerialPortTransmit = 1 << 0,
DiskBlock = 1 << 1,
Software = 1 << 2,
IOPortsAndTimers = 1 << 3,
IOPortsAndTimers = 1 << 3, // i.e. CIA A.
Copper = 1 << 4,
VerticalBlank = 1 << 5,
Blitter = 1 << 6,
@ -32,7 +32,7 @@ enum InterruptFlag: uint16_t {
AudioChannel3 = 1 << 10,
SerialPortReceive = 1 << 11,
DiskSyncMatch = 1 << 12,
External = 1 << 13,
External = 1 << 13, // i.e. CIA B.
};
}
@ -51,6 +51,17 @@ Chipset::Changes Chipset::run_until_cpu_slot() {
return run<true>();
}
void Chipset::set_cia_interrupts(bool cia_a, bool cia_b) {
// TODO: are these really latched, or are they active live?
if(cia_a || cia_b) {
interrupt_requests_ |=
(cia_a ? InterruptFlag::IOPortsAndTimers : 0) |
(cia_b ? InterruptFlag::External : 0);
update_interrupts();
}
}
bool Chipset::Copper::advance(uint16_t position) {
switch(state_) {
default: return false;

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@ -43,6 +43,9 @@ class Chipset {
/// Performs the provided microcycle, which the caller guarantees to be a memory access.
void perform(const CPU::MC68000::Microcycle &);
/// Sets the current state of the CIA interrupt lines.
void set_cia_interrupts(bool cia_a, bool cia_b);
/// Provides the chipset's current interrupt level.
int get_interrupt_level() {
return interrupt_level_;