From 76ca60702136818b807c592b84420cca40e4279f Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Fri, 26 Jul 2024 21:45:03 -0400 Subject: [PATCH] Add a graceful end for JAM. --- .../Mac/Clock SignalTests/65816ComparativeTests.mm | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/OSBindings/Mac/Clock SignalTests/65816ComparativeTests.mm b/OSBindings/Mac/Clock SignalTests/65816ComparativeTests.mm index fb35314b5..6f9d702bd 100644 --- a/OSBindings/Mac/Clock SignalTests/65816ComparativeTests.mm +++ b/OSBindings/Mac/Clock SignalTests/65816ComparativeTests.mm @@ -29,6 +29,16 @@ struct BusHandler: public CPU::MOS6502Esque::BusHandlerT { std::unordered_map inventions; Cycles perform_bus_operation(CPU::MOS6502Esque::BusOperation operation, AddressType address, uint8_t *value) { + // Check for a JAM; if one is found then record just five more bus cycles, arbitrarily. + if(jam_count) { + --jam_count; + if(!jam_count) { + throw StopException(); + } + } else if(processor.is_jammed()) { + jam_count = 5; + } + // Record the basics of the operation. auto &cycle = cycles.emplace_back(); cycle.operation = operation; @@ -110,6 +120,7 @@ struct BusHandler: public CPU::MOS6502Esque::BusHandlerT { int pc_overshoot = 0; std::optional initial_pc; bool allow_pc_repetition = false; + int jam_count = 0; struct Cycle { CPU::MOS6502Esque::BusOperation operation;