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Starts trying to make sense of interrupts.
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@ -26,10 +26,18 @@ uint8_t MFP68901::read(int address) {
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case 0x02:
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case 0x02:
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LOG("Read: data direction " << PADHEX(2) << int(gpip_direction_));
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LOG("Read: data direction " << PADHEX(2) << int(gpip_direction_));
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return gpip_direction_;
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return gpip_direction_;
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case 0x03: LOG("Read: interrupt enable A"); break;
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case 0x03:
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case 0x04: LOG("Read: interrupt enable B"); break;
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LOG("Read: interrupt enable A");
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case 0x05: LOG("Read: interrupt pending A"); break;
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return interrupt_enable_[0];
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case 0x06: LOG("Read: interrupt pending B"); break;
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case 0x04:
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LOG("Read: interrupt enable B");
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return interrupt_enable_[1];
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case 0x05:
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LOG("Read: interrupt pending A");
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return interrupt_pending_[0];
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case 0x06:
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LOG("Read: interrupt pending B");
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return interrupt_pending_[1];
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case 0x07: LOG("Read: interrupt in-service A"); break;
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case 0x07: LOG("Read: interrupt in-service A"); break;
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case 0x08: LOG("Read: interrupt in-service B"); break;
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case 0x08: LOG("Read: interrupt in-service B"); break;
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case 0x09: LOG("Read: interrupt mask A"); break;
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case 0x09: LOG("Read: interrupt mask A"); break;
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@ -209,3 +217,18 @@ void MFP68901::reevaluate_gpip_interrupts() {
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}
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}
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gpip_interrupt_state_ = gpip_state;
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gpip_interrupt_state_ = gpip_state;
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}
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}
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// MARK: - Interrupts
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void MFP68901::begin_interrupt(Interrupt interrupt) {
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// In service is always set.
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interrupt_in_service_[interrupt >> 3] |= 1 << (interrupt & 7);
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// Pending is set only if the interrupt is enabled.
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// interrupt_pending_[interrupt >> 3] |=
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}
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void MFP68901::end_interrupt(Interrupt interrupt) {
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// Reset in-service and pending.
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}
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@ -63,6 +63,47 @@ class MFP68901 {
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uint8_t gpip_interrupt_state_ = 0;
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uint8_t gpip_interrupt_state_ = 0;
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void reevaluate_gpip_interrupts();
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void reevaluate_gpip_interrupts();
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// MARK: - Interrupts
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// Ad hoc documentation: there seems to be a four-stage process here.
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// This is my current understanding:
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//
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// Interrupt in-service refers to whether the signal that would cause an
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// interrupt is active.
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//
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// If the interrupt is in-service and enabled, it will be listed as pending.
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//
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// If a pending interrupt is enabled in the interrupt mask, it will generate
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// a processor interrupt.
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//
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// So, the designers seem to have wanted to allow for polling and interrupts,
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// and then also decided to have some interrupts be able to be completely
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// disabled, so that don't even show up for polling.
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uint8_t interrupt_in_service_[2] = {0, 0};
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uint8_t interrupt_enable_[2] = {0, 0};
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uint8_t interrupt_pending_[2] = {0, 0};
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uint8_t interrupt_mask_[2] = {0, 0};
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enum Interrupt {
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GPIP0 = 0,
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GPIP1,
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GPIP2,
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GPIP3,
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TimerD,
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TimerC,
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GPIP4,
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GPIP5,
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TimerB,
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TransmitError,
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TransmitBufferEmpty,
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ReceiveError,
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ReceiveBufferFull,
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GPIP6,
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GPIP7
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};
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void begin_interrupt(Interrupt interrupt);
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void end_interrupt(Interrupt interrupt);
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};
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};
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}
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}
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