From 780954f27b199f1bfbdcce44038c8eb957b16134 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Tue, 24 May 2022 15:14:20 -0400 Subject: [PATCH] Add TRAP, TRAPV. --- .../Implementation/68000Mk2Implementation.hpp | 32 +++++++++++++++---- .../Implementation/68000Mk2Storage.hpp | 2 +- 2 files changed, 26 insertions(+), 8 deletions(-) diff --git a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp index 1350b2571..cacfbb2cd 100644 --- a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp +++ b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp @@ -17,13 +17,7 @@ namespace CPU { namespace MC68000Mk2 { -// TODO: BERR, interrupt inputs, etc; and obeying the trace flag. -// Also, from Instruction.hpp: -// -// TRAP, TRAPV -// -// Not provided by a 68000: Bccl, BSRl - +// TODO: obeyance of the trace flag, the address/bus error exception. /// States for the state machine which are named by /// me for their purpose rather than automatically by file position. @@ -183,6 +177,8 @@ enum ExecutionState: int { RESET, NOP, STOP, + TRAP, + TRAPV, }; // MARK: - The state machine. @@ -880,6 +876,9 @@ void Processor void complete_bcc(bool, IntT); inline void complete_dbcc(bool, bool, int16_t); inline void bsr(uint32_t); - inline void stop() {} // TODO inline void move_to_usp(uint32_t); inline void move_from_usp(uint32_t &); inline void tas(Preinstruction, uint32_t); @@ -170,6 +169,7 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController { inline void rte() {} inline void rts() {} inline void reset() {} + inline void stop() {} // Some microcycles that will be modified as required and used in the main loop; // the semantics of a switch statement make in-place declarations awkward and