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Provide 64-bit me, mb and sh. Add direct getter for rotate masks.
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@ -1423,12 +1423,31 @@ struct Instruction {
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/// Branch displacement; provided as already sign extended.
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int16_t bd() const { return int16_t(opcode & 0xfffc); }
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// TODO: both MB/ME and mb/me fields seem to be defined. Investigate.
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/// Specifies the first 1 bit of a 32-bit mask for 32-bit rotate operations.
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template <typename IntT> IntT mb() const {
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if constexpr (sizeof(IntT) == 4) {
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return (opcode >> 6) & 0x1f;
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} else {
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return (opcode >> 5) & 0x3f;
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}
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}
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/// Specifies the first 1 bit of a 32/64-bit mask for rotate operations.
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/// Specify IntT as uint32_t for the 32-bit rotate instructions, uint64_t for the 64-bit.
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template <typename IntT> IntT me() const {
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if constexpr (sizeof(IntT) == 4) {
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return (opcode >> 1) & 0x1f;
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} else {
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return (opcode >> 5) & 0x3f;
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}
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}
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/// Specifies the first 1 bit of a 32/64-bit mask for rotate operations.
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uint32_t mb() const { return (opcode >> 6) & 0x1f; }
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/// Specifies the first 1 bit of a 32/64-bit mask for rotate operations.
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uint32_t me() const { return (opcode >> 1) & 0x1f; }
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/// Provides the mask described by 32-bit rotate operations.
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/// i.e. all bits from mb() to me() inclusive.
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uint32_t rotate_mask() const {
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const uint32_t mb_bit = 0x8000'0000 >> mb<uint32_t>();
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const uint32_t me_bit = 0x8000'0000 >> mb<uint32_t>();
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return mb_bit - me_bit + mb_bit;
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}
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/// Condition register source bit A.
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uint32_t crbA() const { return (opcode >> 16) & 0x1f; }
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@ -1456,8 +1475,15 @@ struct Instruction {
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return ((nb - 1) & 31) + 1;
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}
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/// Specifies a shift amount.
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uint32_t sh() const { return (opcode >> 11) & 0x1f; }
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/// Specifies a shift amount. Use IntT = uint32_t to get the shift value embedded in
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/// 32-bit instructions, uint64_t for 64-bit instructions.
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template <typename IntT> uint32_t sh() const {
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uint32_t sh = (opcode >> 11) & 0x1f;
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if constexpr (sizeof(IntT) == 8) {
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sh |= (opcode & 2) << 4;
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}
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return sh;
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}
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/// Specifies one of the 16 segment registers [32-bit only].
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uint32_t sr() const { return (opcode >> 16) & 0xf; }
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