mirror of
https://github.com/TomHarte/CLK.git
synced 2024-06-25 18:30:07 +00:00
Remove the 68000's Mk2 suffix.
This commit is contained in:
Thomas Harte
parent
e56db3c4e5
commit
809cd7bca9
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@ -11,7 +11,7 @@
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#include "../../Activity/Source.hpp"
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#include "../MachineTypes.hpp"
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#include "../../Processors/68000Mk2/68000Mk2.hpp"
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#include "../../Processors/68000/68000.hpp"
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#include "../../Analyser/Static/Amiga/Target.hpp"
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@ -41,7 +41,7 @@ namespace Amiga {
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class ConcreteMachine:
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public Activity::Source,
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public CPU::MC68000Mk2::BusHandler,
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public CPU::MC68000::BusHandler,
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public MachineTypes::AudioProducer,
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public MachineTypes::JoystickMachine,
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public MachineTypes::MappedKeyboardMachine,
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@ -177,7 +177,7 @@ class ConcreteMachine:
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}
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private:
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CPU::MC68000Mk2::Processor<ConcreteMachine, true, true> mc68000_;
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CPU::MC68000::Processor<ConcreteMachine, true, true> mc68000_;
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// MARK: - Memory map.
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@ -841,8 +841,8 @@ void Chipset::update_interrupts() {
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}
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}
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void Chipset::perform(const CPU::MC68000Mk2::Microcycle &cycle) {
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using Microcycle = CPU::MC68000Mk2::Microcycle;
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void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
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using Microcycle = CPU::MC68000::Microcycle;
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const uint32_t register_address = *cycle.address & ChipsetAddressMask;
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if(cycle.operation & Microcycle::Read) {
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@ -20,7 +20,7 @@
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#include "../../ClockReceiver/JustInTime.hpp"
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#include "../../Components/6526/6526.hpp"
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#include "../../Outputs/CRT/CRT.hpp"
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#include "../../Processors/68000Mk2/68000Mk2.hpp"
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#include "../../Processors/68000/68000.hpp"
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#include "../../Storage/Disk/Controller/DiskController.hpp"
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#include "../../Storage/Disk/Drive.hpp"
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@ -58,7 +58,7 @@ class Chipset: private ClockingHint::Observer {
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Changes run_until_after_cpu_slot();
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/// Performs the provided microcycle, which the caller guarantees to be a memory access.
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void perform(const CPU::MC68000Mk2::Microcycle &);
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void perform(const CPU::MC68000::Microcycle &);
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/// Sets the current state of the CIA interrupt lines.
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void set_cia_interrupts(bool cia_a, bool cia_b);
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@ -19,8 +19,8 @@ namespace Amiga {
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class MemoryMap {
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private:
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static constexpr auto PermitRead = CPU::MC68000Mk2::Microcycle::PermitRead;
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static constexpr auto PermitWrite = CPU::MC68000Mk2::Microcycle::PermitWrite;
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static constexpr auto PermitRead = CPU::MC68000::Microcycle::PermitRead;
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static constexpr auto PermitWrite = CPU::MC68000::Microcycle::PermitWrite;
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static constexpr auto PermitReadWrite = PermitRead | PermitWrite;
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public:
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@ -109,12 +109,12 @@ class MemoryMap {
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/// Performs the provided microcycle, which the caller guarantees to be a memory access,
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/// and in the Zorro register range.
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bool perform(const CPU::MC68000Mk2::Microcycle &cycle) {
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bool perform(const CPU::MC68000::Microcycle &cycle) {
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if(!fast_autoconf_visible_) return false;
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const uint32_t register_address = *cycle.address & 0xfe;
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using Microcycle = CPU::MC68000Mk2::Microcycle;
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using Microcycle = CPU::MC68000::Microcycle;
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if(cycle.operation & Microcycle::Read) {
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// Re: Autoconf:
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//
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@ -35,7 +35,7 @@
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#include "../../../Components/DiskII/IWM.hpp"
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#include "../../../Components/DiskII/MacintoshDoubleDensityDrive.hpp"
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#include "../../../Processors/68000Mk2/68000Mk2.hpp"
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#include "../../../Processors/68000/68000.hpp"
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#include "../../../Storage/MassStorage/SCSI/SCSI.hpp"
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#include "../../../Storage/MassStorage/SCSI/DirectAccessDevice.hpp"
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@ -73,7 +73,7 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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public MachineTypes::MediaTarget,
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public MachineTypes::MouseMachine,
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public MachineTypes::MappedKeyboardMachine,
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public CPU::MC68000Mk2::BusHandler,
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public CPU::MC68000::BusHandler,
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public Zilog::SCC::z8530::Delegate,
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public Activity::Source,
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public Configurable::Device,
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@ -191,7 +191,7 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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mc68000_.run_for(cycles);
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}
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using Microcycle = CPU::MC68000Mk2::Microcycle;
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using Microcycle = CPU::MC68000::Microcycle;
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HalfCycles perform_bus_operation(const Microcycle &cycle, int) {
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// Advance time.
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@ -747,7 +747,7 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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Inputs::QuadratureMouse &mouse_;
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};
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CPU::MC68000Mk2::Processor<ConcreteMachine, true, true> mc68000_;
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CPU::MC68000::Processor<ConcreteMachine, true, true> mc68000_;
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DriveSpeedAccumulator drive_speed_accumulator_;
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IWMActor iwm_;
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@ -13,7 +13,7 @@
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//#define LOG_TRACE
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//bool should_log = false;
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#include "../../../Processors/68000Mk2/68000Mk2.hpp"
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#include "../../../Processors/68000/68000.hpp"
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#include "../../../Components/AY38910/AY38910.hpp"
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#include "../../../Components/68901/MFP68901.hpp"
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@ -45,7 +45,7 @@ constexpr int CLOCK_RATE = 8021247;
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using Target = Analyser::Static::AtariST::Target;
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class ConcreteMachine:
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public Atari::ST::Machine,
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public CPU::MC68000Mk2::BusHandler,
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public CPU::MC68000::BusHandler,
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public MachineTypes::TimedMachine,
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public MachineTypes::ScanProducer,
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public MachineTypes::AudioProducer,
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@ -492,7 +492,7 @@ class ConcreteMachine:
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speaker_.run_for(audio_queue_, cycles_since_audio_update_.divide_cycles(Cycles(4)));
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}
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CPU::MC68000Mk2::Processor<ConcreteMachine, true, true> mc68000_;
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CPU::MC68000::Processor<ConcreteMachine, true, true> mc68000_;
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HalfCycles bus_phase_;
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JustInTimeActor<Video> video_;
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@ -1103,6 +1103,9 @@
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/* End PBXCopyFilesBuildPhase section */
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/* Begin PBXFileReference section */
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42AD552E2A0C4D5000ACE410 /* 68000.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = 68000.hpp; sourceTree = "<group>"; };
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42AD55302A0C4D5000ACE410 /* 68000Storage.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = 68000Storage.hpp; sourceTree = "<group>"; };
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42AD55312A0C4D5000ACE410 /* 68000Implementation.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = 68000Implementation.hpp; sourceTree = "<group>"; };
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4B018B88211930DE002A3937 /* 65C02_extended_opcodes_test.bin */ = {isa = PBXFileReference; lastKnownFileType = archive.macbinary; name = 65C02_extended_opcodes_test.bin; path = "Klaus Dormann/65C02_extended_opcodes_test.bin"; sourceTree = "<group>"; };
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4B01A6871F22F0DB001FD6E3 /* Z80MemptrTests.swift */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.swift; path = Z80MemptrTests.swift; sourceTree = "<group>"; };
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4B0333AD2094081A0050B93D /* AppleDSK.cpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.cpp; path = AppleDSK.cpp; sourceTree = "<group>"; };
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@ -2086,9 +2089,6 @@
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4BC9DF4D1D04691600F44158 /* 6560.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = 6560.cpp; sourceTree = "<group>"; };
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4BC9DF4E1D04691600F44158 /* 6560.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = 6560.hpp; sourceTree = "<group>"; };
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4BC9E1ED1D23449A003FCEE4 /* 6502InterruptTests.swift */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.swift; path = 6502InterruptTests.swift; sourceTree = "<group>"; };
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4BCA2F562832A643006C632A /* 68000Mk2.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = 68000Mk2.hpp; sourceTree = "<group>"; };
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4BCA2F592832A807006C632A /* 68000Mk2Storage.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = 68000Mk2Storage.hpp; sourceTree = "<group>"; };
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4BCA2F5A2832A81C006C632A /* 68000Mk2Implementation.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = 68000Mk2Implementation.hpp; sourceTree = "<group>"; };
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4BCA6CC61D9DD9F000C2D7B2 /* CommodoreROM.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = CommodoreROM.cpp; path = Encodings/CommodoreROM.cpp; sourceTree = "<group>"; };
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4BCA6CC71D9DD9F000C2D7B2 /* CommodoreROM.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; name = CommodoreROM.hpp; path = Encodings/CommodoreROM.hpp; sourceTree = "<group>"; };
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4BCA98C21D065CA20062F44C /* 6522.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = 6522.hpp; sourceTree = "<group>"; };
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@ -2278,6 +2278,24 @@
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/* End PBXFrameworksBuildPhase section */
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/* Begin PBXGroup section */
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42AD552D2A0C4D5000ACE410 /* 68000 */ = {
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isa = PBXGroup;
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children = (
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42AD552E2A0C4D5000ACE410 /* 68000.hpp */,
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42AD552F2A0C4D5000ACE410 /* Implementation */,
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);
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path = 68000;
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sourceTree = "<group>";
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};
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42AD552F2A0C4D5000ACE410 /* Implementation */ = {
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isa = PBXGroup;
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children = (
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42AD55302A0C4D5000ACE410 /* 68000Storage.hpp */,
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42AD55312A0C4D5000ACE410 /* 68000Implementation.hpp */,
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);
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path = Implementation;
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sourceTree = "<group>";
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};
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4B051C9F2676F52200CA44E8 /* Enterprise */ = {
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isa = PBXGroup;
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children = (
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@ -4370,7 +4388,7 @@
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4B1414561B58879D00E04248 /* 6502 */,
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4B4DEC15252BFA9C004583AC /* 6502Esque */,
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4BF8D4CC251C0C9C00BBE21B /* 65816 */,
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4BCA2F552832A643006C632A /* 68000Mk2 */,
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42AD552D2A0C4D5000ACE410 /* 68000 */,
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4B77069E1EC9045B0053B588 /* Z80 */,
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);
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name = Processors;
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@ -4600,24 +4618,6 @@
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path = 6560;
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sourceTree = "<group>";
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};
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4BCA2F552832A643006C632A /* 68000Mk2 */ = {
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isa = PBXGroup;
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children = (
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4BCA2F562832A643006C632A /* 68000Mk2.hpp */,
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4BCA2F582832A807006C632A /* Implementation */,
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);
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path = 68000Mk2;
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sourceTree = "<group>";
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};
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4BCA2F582832A807006C632A /* Implementation */ = {
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isa = PBXGroup;
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children = (
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4BCA2F592832A807006C632A /* 68000Mk2Storage.hpp */,
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4BCA2F5A2832A81C006C632A /* 68000Mk2Implementation.hpp */,
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);
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path = Implementation;
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sourceTree = "<group>";
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};
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4BCA6CC91D9DD9F500C2D7B2 /* Encodings */ = {
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isa = PBXGroup;
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children = (
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@ -8,7 +8,7 @@
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#import <XCTest/XCTest.h>
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#include "../../../Processors/68000Mk2/68000Mk2.hpp"
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#include "../../../Processors/68000/68000.hpp"
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#include "../../../InstructionSets/M68k/Executor.hpp"
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#include "../../../InstructionSets/M68k/Decoder.hpp"
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@ -84,9 +84,9 @@ struct TestExecutor {
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};
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/// Binds a bus-accurate 68000 to 16mb of RAM.
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struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
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struct TestProcessor: public CPU::MC68000::BusHandler {
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uint8_t *const ram;
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CPU::MC68000Mk2::Processor<TestProcessor, true, true, true> processor;
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CPU::MC68000::Processor<TestProcessor, true, true, true> processor;
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std::function<void(void)> comparitor;
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TestProcessor(uint8_t *ram) : ram(ram), processor(*this) {}
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@ -96,8 +96,8 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
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if(!instructions_remaining_) comparitor();
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}
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HalfCycles perform_bus_operation(const CPU::MC68000Mk2::Microcycle &cycle, int) {
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using Microcycle = CPU::MC68000Mk2::Microcycle;
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HalfCycles perform_bus_operation(const CPU::MC68000::Microcycle &cycle, int) {
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using Microcycle = CPU::MC68000::Microcycle;
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if(cycle.data_select_active()) {
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cycle.apply(&ram[cycle.host_endian_byte_address()]);
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}
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@ -9,7 +9,7 @@
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#import <XCTest/XCTest.h>
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#include "68000Mk2.hpp"
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#include "68000.hpp"
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#include <array>
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#include <unordered_map>
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@ -11,9 +11,9 @@
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#include <zlib.h>
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#include "68000Mk2.hpp"
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#include "68000.hpp"
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class ComparativeBusHandler: public CPU::MC68000Mk2::BusHandler {
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class ComparativeBusHandler: public CPU::MC68000::BusHandler {
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public:
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ComparativeBusHandler(const char *trace_name) {
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trace = gzopen(trace_name, "rt");
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@ -49,7 +49,7 @@ class ComparativeBusHandler: public CPU::MC68000Mk2::BusHandler {
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}
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}
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virtual CPU::MC68000Mk2::State get_state() = 0;
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virtual CPU::MC68000::State get_state() = 0;
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private:
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int line_count = 0;
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@ -13,7 +13,7 @@
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//#define LOG_TRACE
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#include "68000Mk2.hpp"
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#include "68000.hpp"
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#include "Comparative68000.hpp"
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#include "CSROMFetcher.hpp"
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@ -32,11 +32,11 @@ class EmuTOS: public ComparativeBusHandler {
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m68000_.run_for(cycles);
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}
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CPU::MC68000Mk2::State get_state() final {
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CPU::MC68000::State get_state() final {
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return m68000_.get_state();
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}
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HalfCycles perform_bus_operation(const CPU::MC68000Mk2::Microcycle &cycle, int) {
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HalfCycles perform_bus_operation(const CPU::MC68000::Microcycle &cycle, int) {
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const uint32_t address = cycle.word_address();
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uint32_t word_address = address;
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@ -56,7 +56,7 @@ class EmuTOS: public ComparativeBusHandler {
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word_address %= ram_.size();
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}
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using Microcycle = CPU::MC68000Mk2::Microcycle;
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using Microcycle = CPU::MC68000::Microcycle;
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if(cycle.data_select_active()) {
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uint16_t peripheral_result = 0xffff;
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if(is_peripheral) {
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@ -90,7 +90,7 @@ class EmuTOS: public ComparativeBusHandler {
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}
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private:
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CPU::MC68000Mk2::Processor<EmuTOS, true, true> m68000_;
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CPU::MC68000::Processor<EmuTOS, true, true> m68000_;
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std::vector<uint16_t> emuTOS_;
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std::array<uint16_t, 256*1024> ram_;
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@ -16,7 +16,7 @@
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#include <zlib.h>
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#include "68000Mk2.hpp"
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#include "68000.hpp"
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#include "Comparative68000.hpp"
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#include "CSROMFetcher.hpp"
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@ -35,11 +35,11 @@ class QL: public ComparativeBusHandler {
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m68000_.run_for(cycles);
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}
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CPU::MC68000Mk2::State get_state() final {
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CPU::MC68000::State get_state() final {
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return m68000_.get_state();
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}
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HalfCycles perform_bus_operation(const CPU::MC68000Mk2::Microcycle &cycle, int) {
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HalfCycles perform_bus_operation(const CPU::MC68000::Microcycle &cycle, int) {
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const uint32_t address = cycle.word_address();
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uint32_t word_address = address;
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@ -56,7 +56,7 @@ class QL: public ComparativeBusHandler {
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word_address %= ram_.size();
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}
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using Microcycle = CPU::MC68000Mk2::Microcycle;
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using Microcycle = CPU::MC68000::Microcycle;
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if(cycle.data_select_active()) {
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uint16_t peripheral_result = 0xffff;
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@ -84,7 +84,7 @@ class QL: public ComparativeBusHandler {
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}
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private:
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CPU::MC68000Mk2::Processor<QL, true, false, true> m68000_;
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CPU::MC68000::Processor<QL, true, false, true> m68000_;
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std::vector<uint16_t> rom_;
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std::array<uint16_t, 64*1024> ram_;
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@ -13,7 +13,7 @@
|
|||
#include <functional>
|
||||
#include <vector>
|
||||
|
||||
#include "../../../Processors/68000Mk2/68000Mk2.hpp"
|
||||
#include "../../../Processors/68000/68000.hpp"
|
||||
|
||||
using namespace InstructionSet::M68k;
|
||||
|
||||
|
|
@ -22,7 +22,7 @@ using namespace InstructionSet::M68k;
|
|||
/RESET will put the supervisor stack pointer at 0xFFFF and
|
||||
begin execution at 0x0400.
|
||||
*/
|
||||
class RAM68000: public CPU::MC68000Mk2::BusHandler {
|
||||
class RAM68000: public CPU::MC68000::BusHandler {
|
||||
public:
|
||||
RAM68000() : m68000_(*this) {}
|
||||
|
||||
|
|
@ -78,11 +78,11 @@ class RAM68000: public CPU::MC68000Mk2::BusHandler {
|
|||
return &ram_[(address >> 1) % ram_.size()];
|
||||
}
|
||||
|
||||
HalfCycles perform_bus_operation(const CPU::MC68000Mk2::Microcycle &cycle, int) {
|
||||
HalfCycles perform_bus_operation(const CPU::MC68000::Microcycle &cycle, int) {
|
||||
const uint32_t word_address = cycle.word_address();
|
||||
duration_ += cycle.length;
|
||||
|
||||
using Microcycle = CPU::MC68000Mk2::Microcycle;
|
||||
using Microcycle = CPU::MC68000::Microcycle;
|
||||
if(cycle.data_select_active()) {
|
||||
if(cycle.operation & Microcycle::InterruptAcknowledge) {
|
||||
cycle.value->b = 10;
|
||||
|
|
@ -112,7 +112,7 @@ class RAM68000: public CPU::MC68000Mk2::BusHandler {
|
|||
return HalfCycles(0);
|
||||
}
|
||||
|
||||
CPU::MC68000Mk2::State get_processor_state() {
|
||||
CPU::MC68000::State get_processor_state() {
|
||||
return m68000_.get_state();
|
||||
}
|
||||
|
||||
|
|
@ -131,7 +131,7 @@ class RAM68000: public CPU::MC68000Mk2::BusHandler {
|
|||
private:
|
||||
struct StopException {};
|
||||
|
||||
CPU::MC68000Mk2::Processor<RAM68000, true, true, true> m68000_;
|
||||
CPU::MC68000::Processor<RAM68000, true, true, true> m68000_;
|
||||
std::array<uint16_t, 256*1024> ram_{};
|
||||
int instructions_remaining_;
|
||||
HalfCycles duration_;
|
||||
|
|
|
|||
|
|
@ -1,19 +1,19 @@
|
|||
//
|
||||
// 68000Mk2.hpp
|
||||
// 68000.hpp
|
||||
// Clock Signal
|
||||
//
|
||||
// Created by Thomas Harte on 16/05/2022.
|
||||
// Copyright © 2022 Thomas Harte. All rights reserved.
|
||||
//
|
||||
|
||||
#ifndef _8000Mk2_h
|
||||
#define _8000Mk2_h
|
||||
#ifndef MC68000_h
|
||||
#define MC68000_h
|
||||
|
||||
#include "../../ClockReceiver/ClockReceiver.hpp"
|
||||
#include "../../Numeric/RegisterSizes.hpp"
|
||||
#include "../../InstructionSets/M68k/RegisterSet.hpp"
|
||||
|
||||
namespace CPU::MC68000Mk2 {
|
||||
namespace CPU::MC68000 {
|
||||
|
||||
/*!
|
||||
A microcycle is an atomic unit of 68000 bus activity — it is a single item large enough
|
||||
|
|
@ -359,9 +359,9 @@ struct State {
|
|||
|
||||
}
|
||||
|
||||
#include "Implementation/68000Mk2Storage.hpp"
|
||||
#include "Implementation/68000Storage.hpp"
|
||||
|
||||
namespace CPU::MC68000Mk2 {
|
||||
namespace CPU::MC68000 {
|
||||
|
||||
/*!
|
||||
Provides an emulation of the 68000 with accurate bus logic via the @c BusHandler, subject to the following template parameters:
|
||||
|
|
@ -395,10 +395,10 @@ class Processor: private ProcessorBase {
|
|||
void run_for(HalfCycles duration);
|
||||
|
||||
/// @returns The current processor state.
|
||||
CPU::MC68000Mk2::State get_state();
|
||||
CPU::MC68000::State get_state();
|
||||
|
||||
/// Sets the current processor state.
|
||||
void set_state(const CPU::MC68000Mk2::State &);
|
||||
void set_state(const CPU::MC68000::State &);
|
||||
|
||||
/// Sets all registers to the values provided, fills the prefetch queue and ensures the
|
||||
/// next action the processor will take is to decode whatever is in the queue.
|
||||
|
|
@ -446,6 +446,6 @@ class Processor: private ProcessorBase {
|
|||
|
||||
}
|
||||
|
||||
#include "Implementation/68000Mk2Implementation.hpp"
|
||||
#include "Implementation/68000Implementation.hpp"
|
||||
|
||||
#endif /* _8000Mk2_h */
|
||||
#endif /* MC68000_h */
|
||||
|
|
@ -1,20 +1,20 @@
|
|||
//
|
||||
// 68000Mk2Implementation.hpp
|
||||
// 68000Implementation.hpp
|
||||
// Clock Signal
|
||||
//
|
||||
// Created by Thomas Harte on 16/05/2022.
|
||||
// Copyright © 2022 Thomas Harte. All rights reserved.
|
||||
//
|
||||
|
||||
#ifndef _8000Mk2Implementation_h
|
||||
#define _8000Mk2Implementation_h
|
||||
#ifndef MC68000Implementation_h
|
||||
#define MC68000Implementation_h
|
||||
|
||||
#include <cassert>
|
||||
#include <cstdio>
|
||||
|
||||
#include "../../../InstructionSets/M68k/ExceptionVectors.hpp"
|
||||
|
||||
namespace CPU::MC68000Mk2 {
|
||||
namespace CPU::MC68000 {
|
||||
|
||||
#define AddressingDispatch(x) \
|
||||
x, x##__end = x + InstructionSet::M68k::AddressingModeCount
|
||||
|
|
@ -3020,8 +3020,8 @@ inline void ProcessorBase::move_from_usp(uint32_t &address) {
|
|||
// MARK: - External state.
|
||||
|
||||
template <class BusHandler, bool dtack_is_implicit, bool permit_overrun, bool signal_will_perform>
|
||||
CPU::MC68000Mk2::State Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perform>::get_state() {
|
||||
CPU::MC68000Mk2::State state;
|
||||
CPU::MC68000::State Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perform>::get_state() {
|
||||
CPU::MC68000::State state;
|
||||
|
||||
// This isn't true, but will ensure that both stack_pointers_ have their proper values.
|
||||
did_update_status();
|
||||
|
|
@ -3044,7 +3044,7 @@ CPU::MC68000Mk2::State Processor<BusHandler, dtack_is_implicit, permit_overrun,
|
|||
}
|
||||
|
||||
template <class BusHandler, bool dtack_is_implicit, bool permit_overrun, bool signal_will_perform>
|
||||
void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perform>::set_state(const CPU::MC68000Mk2::State &state) {
|
||||
void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perform>::set_state(const CPU::MC68000::State &state) {
|
||||
// Copy registers and the program counter.
|
||||
for(int c = 0; c < 7; c++) {
|
||||
registers_[c].l = state.registers.data[c];
|
||||
|
|
@ -3072,7 +3072,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
|
|||
template <class BusHandler, bool dtack_is_implicit, bool permit_overrun, bool signal_will_perform>
|
||||
void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perform>::decode_from_state(const InstructionSet::M68k::RegisterSet ®isters) {
|
||||
// Populate registers.
|
||||
CPU::MC68000Mk2::State state;
|
||||
CPU::MC68000::State state;
|
||||
state.registers = registers;
|
||||
set_state(state);
|
||||
|
||||
|
|
@ -3105,4 +3105,4 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
|
|||
|
||||
}
|
||||
|
||||
#endif /* _8000Mk2Implementation_h */
|
||||
#endif /* MC68000Implementation_h */
|
||||
|
|
@ -1,13 +1,13 @@
|
|||
//
|
||||
// 68000Mk2Storage.hpp
|
||||
// 68000Storage.hpp
|
||||
// Clock Signal
|
||||
//
|
||||
// Created by Thomas Harte on 16/05/2022.
|
||||
// Copyright © 2022 Thomas Harte. All rights reserved.
|
||||
//
|
||||
|
||||
#ifndef _8000Mk2Storage_h
|
||||
#define _8000Mk2Storage_h
|
||||
#ifndef MC68000Storage_h
|
||||
#define MC68000Storage_h
|
||||
|
||||
#include "../../../InstructionSets/M68k/Decoder.hpp"
|
||||
#include "../../../InstructionSets/M68k/Perform.hpp"
|
||||
|
|
@ -15,7 +15,7 @@
|
|||
|
||||
#include <limits>
|
||||
|
||||
namespace CPU::MC68000Mk2 {
|
||||
namespace CPU::MC68000 {
|
||||
|
||||
struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
|
||||
ProcessorBase() {
|
||||
|
|
@ -223,4 +223,4 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
|
|||
|
||||
}
|
||||
|
||||
#endif /* _8000Mk2Storage_h */
|
||||
#endif /* MC68000Storage_h */
|
||||
Loading…
Reference in New Issue
Block a user