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Eliminate false prefetch for BSR.
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@ -135,7 +135,8 @@ enum ExecutionState: int {
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Bccb_branch_not_taken,
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Bccw_branch_not_taken,
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BSR,
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BSRb,
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BSRw,
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JSRJMPAddressRegisterIndirect,
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JSRJMPAddressRegisterIndirectWithDisplacement,
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@ -814,8 +815,8 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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SpecialCASE(Bccb);
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SpecialCASE(Bccw);
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StdCASE(BSRb, perform_state_ = BSR);
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StdCASE(BSRw, perform_state_ = BSR);
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SpecialCASE(BSRb);
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SpecialCASE(BSRw);
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Duplicate(JMP, JSR)
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StdCASE(JSR, {
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@ -1866,22 +1867,22 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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//
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// BSR
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//
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BeginState(BSR):
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BeginState(BSRb):
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BeginState(BSRw):
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IdleBus(1); // n
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// Calculate the address of the next instruction.
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// Calculate the address of the next instruction and the next program counter.
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if(instruction_.operand_size() == InstructionSet::M68k::DataSize::Word) {
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temporary_address_.l = instruction_address_.l + 4;
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program_counter_.l = instruction_address_.l + uint32_t(int16_t(prefetch_.w)) + 2;
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} else {
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temporary_address_.l = instruction_address_.l + 2;
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program_counter_.l = instruction_address_.l + uint32_t(int8_t(opcode_)) + 2;
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}
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// Push it to the stack.
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// Push the next instruction address to the stack.
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Push(temporary_address_);
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// Get the new PC.
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PerformDynamic();
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Prefetch(); // np
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Prefetch(); // np
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MoveToStateSpecific(Decode);
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@ -2516,10 +2517,6 @@ template <typename IntT> void ProcessorBase::complete_bcc(bool take_branch, IntT
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Bccb_branch_not_taken : Bccw_branch_not_taken;
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}
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void ProcessorBase::bsr(uint32_t offset) {
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program_counter_.l = instruction_address_.l + offset + 2;
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}
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void ProcessorBase::did_bit_op(int bit_position) {
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dynamic_instruction_length_ = int(bit_position > 15);
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}
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@ -155,7 +155,6 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
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inline void did_update_status();
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template <typename IntT> void complete_bcc(bool, IntT);
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inline void complete_dbcc(bool, bool, int16_t);
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inline void bsr(uint32_t);
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inline void move_to_usp(uint32_t);
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inline void move_from_usp(uint32_t &);
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inline void tas(Preinstruction, uint32_t);
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@ -167,6 +166,7 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
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template <typename IntT> void movem_toM(Preinstruction, uint32_t, uint32_t) {}
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template <typename IntT> void movem_toR(Preinstruction, uint32_t, uint32_t) {}
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void jsr(uint32_t) {}
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void bsr(uint32_t) {}
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void jmp(uint32_t) {}
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inline void pea(uint32_t) {}
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inline void link(Preinstruction, uint32_t) {}
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