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Eliminate false prefetch for BSR.

This commit is contained in:
Thomas Harte 2022-05-25 16:32:02 -04:00
parent 56ad6d24ee
commit 80c1bedffb
2 changed files with 11 additions and 14 deletions

View File

@ -135,7 +135,8 @@ enum ExecutionState: int {
Bccb_branch_not_taken,
Bccw_branch_not_taken,
BSR,
BSRb,
BSRw,
JSRJMPAddressRegisterIndirect,
JSRJMPAddressRegisterIndirectWithDisplacement,
@ -814,8 +815,8 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
SpecialCASE(Bccb);
SpecialCASE(Bccw);
StdCASE(BSRb, perform_state_ = BSR);
StdCASE(BSRw, perform_state_ = BSR);
SpecialCASE(BSRb);
SpecialCASE(BSRw);
Duplicate(JMP, JSR)
StdCASE(JSR, {
@ -1866,22 +1867,22 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
//
// BSR
//
BeginState(BSR):
BeginState(BSRb):
BeginState(BSRw):
IdleBus(1); // n
// Calculate the address of the next instruction.
// Calculate the address of the next instruction and the next program counter.
if(instruction_.operand_size() == InstructionSet::M68k::DataSize::Word) {
temporary_address_.l = instruction_address_.l + 4;
program_counter_.l = instruction_address_.l + uint32_t(int16_t(prefetch_.w)) + 2;
} else {
temporary_address_.l = instruction_address_.l + 2;
program_counter_.l = instruction_address_.l + uint32_t(int8_t(opcode_)) + 2;
}
// Push it to the stack.
// Push the next instruction address to the stack.
Push(temporary_address_);
// Get the new PC.
PerformDynamic();
Prefetch(); // np
Prefetch(); // np
MoveToStateSpecific(Decode);
@ -2516,10 +2517,6 @@ template <typename IntT> void ProcessorBase::complete_bcc(bool take_branch, IntT
Bccb_branch_not_taken : Bccw_branch_not_taken;
}
void ProcessorBase::bsr(uint32_t offset) {
program_counter_.l = instruction_address_.l + offset + 2;
}
void ProcessorBase::did_bit_op(int bit_position) {
dynamic_instruction_length_ = int(bit_position > 15);
}

View File

@ -155,7 +155,6 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
inline void did_update_status();
template <typename IntT> void complete_bcc(bool, IntT);
inline void complete_dbcc(bool, bool, int16_t);
inline void bsr(uint32_t);
inline void move_to_usp(uint32_t);
inline void move_from_usp(uint32_t &);
inline void tas(Preinstruction, uint32_t);
@ -167,6 +166,7 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
template <typename IntT> void movem_toM(Preinstruction, uint32_t, uint32_t) {}
template <typename IntT> void movem_toR(Preinstruction, uint32_t, uint32_t) {}
void jsr(uint32_t) {}
void bsr(uint32_t) {}
void jmp(uint32_t) {}
inline void pea(uint32_t) {}
inline void link(Preinstruction, uint32_t) {}