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Merge pull request #638 from TomHarte/SimplifiedBus
Simplifies code around Mac bus decoding.
This commit is contained in:
Thomas Harte
GitHub
commit
80f6d665d9
@ -131,6 +131,9 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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// Insert any supplied media.
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insert_media(target.media);
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// Set the immutables of the memory map.
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setup_memory_map();
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}
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~ConcreteMachine() {
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@ -152,95 +155,47 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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using Microcycle = CPU::MC68000::Microcycle;
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HalfCycles perform_bus_operation(const Microcycle &cycle, int is_supervisor) {
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// TODO: pick a delay if this is a video-clashing memory fetch.
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HalfCycles delay(0);
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time_since_video_update_ += cycle.length;
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iwm_.time_since_update += cycle.length;
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// Grab the word-precision address being accessed.
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uint32_t word_address = 0;
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// The VIA runs at one-tenth of the 68000's clock speed, in sync with the E clock.
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// See: Guide to the Macintosh Hardware Family p149 (PDF p188). Some extra division
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// may occur here in order to provide VSYNC at a proper moment.
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// Possibly route vsync.
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if(time_since_video_update_ < time_until_video_event_) {
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via_clock_ += cycle.length;
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via_.run_for(via_clock_.divide(HalfCycles(10)));
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} else {
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auto via_time_base = time_since_video_update_ - cycle.length;
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auto via_cycles_outstanding = cycle.length;
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while(time_until_video_event_ < time_since_video_update_) {
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const auto via_cycles = time_until_video_event_ - via_time_base;
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via_time_base = HalfCycles(0);
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via_cycles_outstanding -= via_cycles;
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via_clock_ += via_cycles;
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via_.run_for(via_clock_.divide(HalfCycles(10)));
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video_.run_for(time_until_video_event_);
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time_since_video_update_ -= time_until_video_event_;
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time_until_video_event_ = video_.get_next_sequence_point();
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via_.set_control_line_input(MOS::MOS6522::Port::A, MOS::MOS6522::Line::One, !video_.vsync());
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}
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via_clock_ += via_cycles_outstanding;
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via_.run_for(via_clock_.divide(HalfCycles(10)));
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}
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// The keyboard also has a clock, albeit a very slow one — 100,000 cycles/second.
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// Its clock and data lines are connected to the VIA.
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keyboard_clock_ += cycle.length;
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const auto keyboard_ticks = keyboard_clock_.divide(HalfCycles(CLOCK_RATE / 100000));
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if(keyboard_ticks > HalfCycles(0)) {
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keyboard_.run_for(keyboard_ticks);
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via_.set_control_line_input(MOS::MOS6522::Port::B, MOS::MOS6522::Line::Two, keyboard_.get_data());
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via_.set_control_line_input(MOS::MOS6522::Port::B, MOS::MOS6522::Line::One, keyboard_.get_clock());
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}
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// Feed mouse inputs within at most 1250 cycles of each other.
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if(mouse_.has_steps()) {
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time_since_mouse_update_ += cycle.length;
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const auto mouse_ticks = time_since_mouse_update_.divide(HalfCycles(2500));
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if(mouse_ticks > HalfCycles(0)) {
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mouse_.prepare_step();
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scc_.set_dcd(0, mouse_.get_channel(1) & 1);
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scc_.set_dcd(1, mouse_.get_channel(0) & 1);
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// Take a sneak peak and add a delay if this is a RAM access that would overlap with video.
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if(cycle.data_select_active()) {
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word_address = cycle.active_operation_word_address();
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if(memory_map_[word_address >> 18] == BusDevice::RAM && ram_subcycle_ < 4) {
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delay = HalfCycles(4 - ram_subcycle_);
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}
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}
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// TODO: SCC should be clocked at a divide-by-two, if and when it actually has
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// anything connected.
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// Consider updating the real-time clock.
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real_time_clock_ += cycle.length;
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auto ticks = real_time_clock_.divide_cycles(Cycles(CLOCK_RATE)).as_int();
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while(ticks--) {
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clock_.update();
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// TODO: leave a delay between toggling the input rather than using this coupled hack.
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via_.set_control_line_input(MOS::MOS6522::Port::A, MOS::MOS6522::Line::Two, true);
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via_.set_control_line_input(MOS::MOS6522::Port::A, MOS::MOS6522::Line::Two, false);
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}
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// Advance time.
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advance_time(cycle.length + delay);
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// A null cycle leaves nothing else to do.
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if(!(cycle.operation & (Microcycle::NewAddress | Microcycle::SameAddress))) return delay;
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auto word_address = cycle.active_operation_word_address();
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// Everything above E0 0000 is signalled as being on the peripheral bus.
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mc68000_.set_is_peripheral_address(word_address >= 0x700000);
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// All code below deals only with reads and writes — cycles in which a
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// data select is active. So quit now if this is not the active part of
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// a read or write.
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// a read or write.
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if(!cycle.data_select_active()) return delay;
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// Check whether this access maps into the IO area; if so then
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// apply more complicated decoding logic.
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if(word_address >= 0x400000) {
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const int register_address = word_address >> 8;
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uint16_t *memory_base = nullptr;
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switch(memory_map_[word_address >> 18]) {
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default: assert(false);
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case BusDevice::Unassigned:
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fill_unmapped(cycle);
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return delay;
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case BusDevice::VIA: {
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if(*cycle.address & 1) {
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fill_unmapped(cycle);
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} else {
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const int register_address = word_address >> 8;
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switch(word_address & 0x78f000) {
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case 0x70f000:
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// VIA accesses are via address 0xefe1fe + register*512,
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// which at word precision is 0x77f0ff + register*256.
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if(cycle.operation & Microcycle::Read) {
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@ -248,9 +203,23 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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} else {
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via_.set_register(register_address, cycle.value->halves.low);
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}
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break;
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case 0x68f000:
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if(cycle.operation & Microcycle::SelectWord) cycle.value->halves.high = 0xff;
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}
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} return delay;
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case BusDevice::PhaseRead: {
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if(cycle.operation & Microcycle::Read) {
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cycle.value->halves.low = phase_ & 7;
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}
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if(cycle.operation & Microcycle::SelectWord) cycle.value->halves.high = 0xff;
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} return delay;
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case BusDevice::IWM: {
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if(*cycle.address & 1) {
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const int register_address = word_address >> 8;
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// The IWM; this is a purely polled device, so can be run on demand.
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iwm_.flush();
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if(cycle.operation & Microcycle::Read) {
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@ -258,101 +227,79 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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} else {
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iwm_.iwm.write(register_address, cycle.value->halves.low);
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}
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break;
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case 0x780000:
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// Phase read.
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if(cycle.operation & Microcycle::Read) {
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cycle.value->halves.low = phase_ & 7;
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}
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break;
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if(cycle.operation & Microcycle::SelectWord) cycle.value->halves.high = 0xff;
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} else {
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fill_unmapped(cycle);
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}
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} return delay;
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case 0x480000: case 0x48f000:
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case 0x580000: case 0x58f000:
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// Any word access here adjusts phase.
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if(cycle.operation & Microcycle::SelectWord) {
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++phase_;
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case BusDevice::SCCReadResetPhase: {
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// Any word access here adjusts phase.
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if(cycle.operation & Microcycle::SelectWord) {
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adjust_phase();
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} else {
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// A0 = 1 => reset; A0 = 0 => read.
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if(*cycle.address & 1) {
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scc_.reset();
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if(cycle.operation & Microcycle::Read) {
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cycle.value->halves.low = 0xff;
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}
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} else {
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if(word_address < 0x500000) {
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// A0 = 1 => reset; A0 = 0 => read.
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if(*cycle.address & 1) {
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scc_.reset();
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} else {
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const auto read = scc_.read(int(word_address));
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if(cycle.operation & Microcycle::Read) {
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cycle.value->halves.low = read;
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}
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}
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} else {
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if(*cycle.address & 1) {
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if(cycle.operation & Microcycle::Read) {
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scc_.write(int(word_address), 0xff);
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} else {
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scc_.write(int(word_address), cycle.value->halves.low);
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}
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}
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const auto read = scc_.read(int(word_address));
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if(cycle.operation & Microcycle::Read) {
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cycle.value->halves.low = read;
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}
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}
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break;
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default:
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if(cycle.operation & Microcycle::Read) {
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LOG("Unrecognised read " << PADHEX(6) << (*cycle.address & 0xffffff));
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cycle.value->halves.low = 0x00;
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} else {
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LOG("Unrecognised write %06x" << PADHEX(6) << (*cycle.address & 0xffffff));
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}
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break;
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}
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if(cycle.operation & Microcycle::SelectWord) cycle.value->halves.high = 0xff;
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return delay;
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}
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// Having reached here, this is a RAM or ROM access.
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// When ROM overlay is enabled, the ROM begins at both $000000 and $400000,
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// and RAM is available at $600000.
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//
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// Otherwise RAM is mapped at $000000 and ROM from $400000.
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uint16_t *memory_base;
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if(
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(!ROM_is_overlay_ && word_address < 0x200000) ||
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(ROM_is_overlay_ && word_address >= 0x300000)
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) {
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memory_base = ram_;
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word_address &= ram_mask_;
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// This is coupled with the Macintosh implementation of video; the magic
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// constant should probably be factored into the Video class.
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// It embodies knowledge of the fact that video (and audio) will always
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// be fetched from the final $d900 bytes (i.e. $6c80 words) of memory.
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// (And that ram_mask_ = ram size - 1).
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// if(word_address > ram_mask_ - 0x6c80)
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update_video();
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} else {
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memory_base = rom_;
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word_address &= rom_mask_;
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// Writes to ROM have no effect, and it doesn't mirror above 0x60000.
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if(!(cycle.operation & Microcycle::Read)) return delay;
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if(word_address >= 0x300000) {
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if(cycle.operation & Microcycle::SelectWord) {
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cycle.value->full = 0xffff;
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} else {
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cycle.value->halves.low = 0xff;
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}
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return delay;
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}
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} return delay;
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case BusDevice::SCCWrite: {
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// Any word access here adjusts phase.
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if(cycle.operation & Microcycle::SelectWord) {
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adjust_phase();
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} else {
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if(*cycle.address & 1) {
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if(cycle.operation & Microcycle::Read) {
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scc_.write(int(word_address), 0xff);
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cycle.value->halves.low = 0xff;
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} else {
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scc_.write(int(word_address), cycle.value->halves.low);
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}
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} else {
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fill_unmapped(cycle);
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}
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}
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} return delay;
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case BusDevice::RAM: {
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// This is coupled with the Macintosh implementation of video; the magic
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// constant should probably be factored into the Video class.
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// It embodies knowledge of the fact that video (and audio) will always
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// be fetched from the final $d900 bytes (i.e. $6c80 words) of memory.
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// (And that ram_mask_ = ram size - 1).
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if(word_address > ram_mask_ - 0x6c80)
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update_video();
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memory_base = ram_;
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word_address &= ram_mask_;
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} break;
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case BusDevice::ROM: {
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if(!(cycle.operation & Microcycle::Read)) return delay;
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memory_base = rom_;
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word_address &= rom_mask_;
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} break;
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}
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// If control has fallen through to here, the access is either a read from ROM, or a read or write to RAM.
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// TODO: interrupt acknowledge cycles also end up here, which may suggest the 68000 is loading the address bus
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// incorrectly during interrupt acknowledgment cycles. Check.
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switch(cycle.operation & (Microcycle::SelectWord | Microcycle::SelectByte | Microcycle::Read | Microcycle::InterruptAcknowledge)) {
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default:
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break;
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// Catches the deliberation set of operation to 0 above.
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case 0: break;
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case Microcycle::InterruptAcknowledge | Microcycle::SelectByte:
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// The Macintosh uses autovectored interrupts.
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mc68000_.set_is_peripheral_address(true);
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@ -375,17 +322,6 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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break;
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}
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/*
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Normal memory map:
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000000: RAM
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400000: ROM
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9FFFF8+: SCC read operations
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BFFFF8+: SCC write operations
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DFE1FF+: IWM
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EFE1FE+: VIA
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*/
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return delay;
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}
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@ -406,6 +342,48 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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void set_rom_is_overlay(bool rom_is_overlay) {
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ROM_is_overlay_ = rom_is_overlay;
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using Model = Analyser::Static::Macintosh::Target::Model;
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switch(model) {
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case Model::Mac128k:
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case Model::Mac512k:
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case Model::Mac512ke:
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populate_memory_map([rom_is_overlay] (std::function<void(int target, BusDevice device)> map_to) {
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// Addresses up to $80 0000 aren't affected by this bit.
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if(rom_is_overlay) {
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// Up to $60 0000 mirrors of the ROM alternate with unassigned areas every $10 0000 byes.
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for(int c = 0; c <= 0x600000; c += 0x100000) {
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map_to(c, ((c >> 20)&1) ? BusDevice::ROM : BusDevice::Unassigned);
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}
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map_to(0x800000, BusDevice::RAM);
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} else {
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map_to(0x400000, BusDevice::RAM);
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map_to(0x500000, BusDevice::ROM);
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map_to(0x800000, BusDevice::Unassigned);
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}
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});
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break;
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case Model::MacPlus:
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populate_memory_map([rom_is_overlay] (std::function<void(int target, BusDevice device)> map_to) {
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// Addresses up to $80 0000 aren't affected by this bit.
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if(rom_is_overlay) {
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map_to(0x100000, BusDevice::ROM);
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map_to(0x400000, BusDevice::Unassigned);
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map_to(0x500000, BusDevice::ROM);
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map_to(0x580000, BusDevice::Unassigned);
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map_to(0x600000, BusDevice::SCSI);
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map_to(0x800000, BusDevice::RAM);
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} else {
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map_to(0x400000, BusDevice::RAM);
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map_to(0x500000, BusDevice::ROM);
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map_to(0x580000, BusDevice::Unassigned);
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map_to(0x600000, BusDevice::SCSI);
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map_to(0x800000, BusDevice::Unassigned);
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}
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});
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break;
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}
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}
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bool video_is_outputting() {
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@ -468,7 +446,90 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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}
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private:
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void update_video() {
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forceinline void adjust_phase() {
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++phase_;
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}
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forceinline void fill_unmapped(const Microcycle &cycle) {
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if(!(cycle.operation & Microcycle::Read)) return;
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if(cycle.operation & Microcycle::SelectWord) {
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cycle.value->full = 0xffff;
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} else {
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cycle.value->halves.low = 0xff;
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}
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}
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/// Advances all non-CPU components by @c duration half cycles.
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forceinline void advance_time(HalfCycles duration) {
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time_since_video_update_ += duration;
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iwm_.time_since_update += duration;
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ram_subcycle_ = (ram_subcycle_ + duration.as_int()) & 15;
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// The VIA runs at one-tenth of the 68000's clock speed, in sync with the E clock.
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// See: Guide to the Macintosh Hardware Family p149 (PDF p188). Some extra division
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// may occur here in order to provide VSYNC at a proper moment.
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// Possibly route vsync.
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if(time_since_video_update_ < time_until_video_event_) {
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via_clock_ += duration;
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via_.run_for(via_clock_.divide(HalfCycles(10)));
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} else {
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auto via_time_base = time_since_video_update_ - duration;
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auto via_cycles_outstanding = duration;
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while(time_until_video_event_ < time_since_video_update_) {
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const auto via_cycles = time_until_video_event_ - via_time_base;
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via_time_base = HalfCycles(0);
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via_cycles_outstanding -= via_cycles;
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via_clock_ += via_cycles;
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via_.run_for(via_clock_.divide(HalfCycles(10)));
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video_.run_for(time_until_video_event_);
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time_since_video_update_ -= time_until_video_event_;
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time_until_video_event_ = video_.get_next_sequence_point();
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via_.set_control_line_input(MOS::MOS6522::Port::A, MOS::MOS6522::Line::One, !video_.vsync());
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}
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via_clock_ += via_cycles_outstanding;
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via_.run_for(via_clock_.divide(HalfCycles(10)));
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}
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|
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// The keyboard also has a clock, albeit a very slow one — 100,000 cycles/second.
|
||||
// Its clock and data lines are connected to the VIA.
|
||||
keyboard_clock_ += duration;
|
||||
const auto keyboard_ticks = keyboard_clock_.divide(HalfCycles(CLOCK_RATE / 100000));
|
||||
if(keyboard_ticks > HalfCycles(0)) {
|
||||
keyboard_.run_for(keyboard_ticks);
|
||||
via_.set_control_line_input(MOS::MOS6522::Port::B, MOS::MOS6522::Line::Two, keyboard_.get_data());
|
||||
via_.set_control_line_input(MOS::MOS6522::Port::B, MOS::MOS6522::Line::One, keyboard_.get_clock());
|
||||
}
|
||||
|
||||
// Feed mouse inputs within at most 1250 cycles of each other.
|
||||
if(mouse_.has_steps()) {
|
||||
time_since_mouse_update_ += duration;
|
||||
const auto mouse_ticks = time_since_mouse_update_.divide(HalfCycles(2500));
|
||||
if(mouse_ticks > HalfCycles(0)) {
|
||||
mouse_.prepare_step();
|
||||
scc_.set_dcd(0, mouse_.get_channel(1) & 1);
|
||||
scc_.set_dcd(1, mouse_.get_channel(0) & 1);
|
||||
}
|
||||
}
|
||||
|
||||
// TODO: SCC should be clocked at a divide-by-two, if and when it actually has
|
||||
// anything connected.
|
||||
|
||||
// Consider updating the real-time clock.
|
||||
real_time_clock_ += duration;
|
||||
auto ticks = real_time_clock_.divide_cycles(Cycles(CLOCK_RATE)).as_int();
|
||||
while(ticks--) {
|
||||
clock_.update();
|
||||
// TODO: leave a delay between toggling the input rather than using this coupled hack.
|
||||
via_.set_control_line_input(MOS::MOS6522::Port::A, MOS::MOS6522::Line::Two, true);
|
||||
via_.set_control_line_input(MOS::MOS6522::Port::A, MOS::MOS6522::Line::Two, false);
|
||||
}
|
||||
}
|
||||
|
||||
forceinline void update_video() {
|
||||
video_.run_for(time_since_video_update_.flush<HalfCycles>());
|
||||
time_until_video_event_ = video_.get_next_sequence_point();
|
||||
}
|
||||
@ -627,12 +688,90 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
|
||||
|
||||
bool ROM_is_overlay_ = true;
|
||||
int phase_ = 1;
|
||||
int ram_subcycle_ = 0;
|
||||
|
||||
DoubleDensityDrive drives_[2];
|
||||
Inputs::QuadratureMouse mouse_;
|
||||
|
||||
Apple::Macintosh::KeyboardMapper keyboard_mapper_;
|
||||
|
||||
enum class BusDevice {
|
||||
RAM, ROM, VIA, IWM, SCCWrite, SCCReadResetPhase, SCSI, PhaseRead, Unassigned
|
||||
};
|
||||
|
||||
/// Divides the 24-bit address space up into $80000 (i.e. 512kb) segments, recording
|
||||
/// which device is current mapped in each area. Keeping it in a table is a bit faster
|
||||
/// than the multi-level address inspection that is otherwise required, as well as
|
||||
/// simplifying slightly the handling of different models.
|
||||
///
|
||||
/// So: index with the top 5 bits of the 24-bit address.
|
||||
BusDevice memory_map_[32];
|
||||
|
||||
void setup_memory_map() {
|
||||
// Apply the power-up memory map, i.e. assume that ROM_is_overlay_ = true.
|
||||
|
||||
using Model = Analyser::Static::Macintosh::Target::Model;
|
||||
switch(model) {
|
||||
default: assert(false);
|
||||
|
||||
case Model::Mac128k:
|
||||
case Model::Mac512k:
|
||||
case Model::Mac512ke:
|
||||
populate_memory_map([] (std::function<void(int target, BusDevice device)> map_to) {
|
||||
// Up to $60 0000 mirrors of the ROM alternate with unassigned areas every $10 0000 byes.
|
||||
for(int c = 0; c <= 0x600000; c += 0x100000) {
|
||||
map_to(c, ((c >> 20)&1) ? BusDevice::ROM : BusDevice::Unassigned);
|
||||
}
|
||||
map_to(0x800000, BusDevice::RAM);
|
||||
map_to(0x900000, BusDevice::Unassigned);
|
||||
map_to(0xa00000, BusDevice::SCCReadResetPhase);
|
||||
map_to(0xb00000, BusDevice::Unassigned);
|
||||
map_to(0xc00000, BusDevice::SCCWrite);
|
||||
map_to(0xd00000, BusDevice::Unassigned);
|
||||
map_to(0xe00000, BusDevice::IWM);
|
||||
map_to(0xe80000, BusDevice::Unassigned);
|
||||
map_to(0xf00000, BusDevice::VIA);
|
||||
map_to(0xf80000, BusDevice::PhaseRead);
|
||||
map_to(0x1000000, BusDevice::Unassigned);
|
||||
});
|
||||
break;
|
||||
|
||||
case Model::MacPlus:
|
||||
populate_memory_map([] (std::function<void(int target, BusDevice device)> map_to) {
|
||||
map_to(0x100000, BusDevice::ROM);
|
||||
map_to(0x400000, BusDevice::Unassigned);
|
||||
map_to(0x500000, BusDevice::ROM);
|
||||
map_to(0x580000, BusDevice::Unassigned);
|
||||
map_to(0x600000, BusDevice::SCSI);
|
||||
map_to(0x800000, BusDevice::RAM);
|
||||
map_to(0x900000, BusDevice::Unassigned);
|
||||
map_to(0xa00000, BusDevice::SCCReadResetPhase);
|
||||
map_to(0xb00000, BusDevice::Unassigned);
|
||||
map_to(0xc00000, BusDevice::SCCWrite);
|
||||
map_to(0xd00000, BusDevice::Unassigned);
|
||||
map_to(0xe00000, BusDevice::IWM);
|
||||
map_to(0xe80000, BusDevice::Unassigned);
|
||||
map_to(0xf00000, BusDevice::VIA);
|
||||
map_to(0xf80000, BusDevice::PhaseRead);
|
||||
map_to(0x1000000, BusDevice::Unassigned);
|
||||
});
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void populate_memory_map(std::function<void(std::function<void(int, BusDevice)>)> populator) {
|
||||
// Define semantics for below; map_to will write from the current cursor position
|
||||
// to the supplied 24-bit address, setting a particular mapped device.
|
||||
int segment = 0;
|
||||
auto map_to = [&segment, this](int address, BusDevice device) {
|
||||
for(; segment < address >> 19; ++segment) {
|
||||
this->memory_map_[segment] = device;
|
||||
}
|
||||
};
|
||||
|
||||
populator(map_to);
|
||||
}
|
||||
|
||||
uint32_t ram_mask_ = 0;
|
||||
uint32_t rom_mask_ = 0;
|
||||
uint16_t rom_[64*1024];
|
||||
|
||||
Loading…
Reference in New Issue
Block a user