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Fix installation of LCW test value; thereby permit all tests.
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@ -44,23 +44,23 @@ Perform, in the order listed:
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"hires": false,
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If this is true, access IO address `0x57`; otherwise access IO address `0x56`.
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If `hires` is true, access IO address `0x57`; otherwise access IO address `0x56`.
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"lcw": false,
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If this is true, access IO address `0x81` twice; otherwise access IO address `0x80` once.
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If `lcw` is true, write any value to IO address `0x81` twice; otherwise write to IO address `0x80` at least once.
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"80store": true,
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If this is true, access IO address `0x01`; otherwise access IO address `0x00`.
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If `80store` is true, access IO address `0x01`; otherwise access IO address `0x00`.
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"shadow": 12,
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Store this value to IO address `0x35`.
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Store the value of `shadow` to IO address `0x35`.
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"state": 183,
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Store this value to IO address `0x68`.
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Store the value of `state` to IO address `0x68`.
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## Test
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@ -250,8 +250,8 @@ namespace {
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const uint8_t state = [test[@"state"] integerValue];
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_memoryMap.access(0xc056 + highRes, false);
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_memoryMap.access(0xc080 + lcw, false);
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_memoryMap.access(0xc080 + lcw, false);
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_memoryMap.access(0xc080 + lcw, true);
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_memoryMap.access(0xc080 + lcw, true);
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_memoryMap.access(0xc000 + store80, false);
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_memoryMap.set_shadow_register(shadow);
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_memoryMap.set_state_register(state);
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@ -344,20 +344,6 @@ namespace {
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return;
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}
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// Questionable test results: I'm not sure the source is correct in its
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// handling of language card read access. Don't test that.
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//
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// This test set treats the language card write flip flop as _enabling_
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// writes. I think it _disables_ writes. TODO: reconcile.
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if(
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(logical >= 0x00d0 && logical < 0x0100) ||
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(logical >= 0x01d0 && logical < 0x0200) ||
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(logical >= 0xe0d0 && logical < 0xe100) ||
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(logical >= 0xe1d0 && logical < 0xe200)
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) {
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return;
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}
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XCTAssert(region.write != nullptr);
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if(region.write == nullptr) {
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*stop = YES;
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